EPM7128SLC84-15 vs EPM7128SLC8410 比較
詳細な並列比較: EPM7128SLC84-15 メーカー: Intel および EPM7128SLC8410 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Intel
EPM7128SLC84-15 - 128-Macrocell MAX 7000S CPLD, 84-PLCC | Intel / Altera
EPM7128SLC84-15 ⚠ ラストタイムバイ仕様比較
| パラメータ | EPM7128SLC84-15 | EPM7128SLC8410 |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $10.40 | $9.75 |
| Family | MAX 7000S | MAX 7000S |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 | — |
| User I/Os | 68 (in 84-PLCC) | — |
| パッケージ | 84-Pin PLCC (J-Lead, J84) | 84-pin PLCC (J-lead) |
| Speed Grade | -15 (15 ns pin-to-pin delay) | — |
| Propagation Delay (tPD) | 15 ns | 10 ns |
| Maximum Internal Frequency (fMAX) | 76.9 MHz | — |
| Logic Family / Process | CMOS, 5V, EEPROM | — |
| Supply Voltage (VCCINT) | 5 V | 4.75 V to 5.25 V (5 V nominal) |
| I/O Standard Support | 5.0 V TTL/CMOS (multi-volt I/O compatible with 3.3V) | — |
| Programming Interface | JTAG (IEEE Std. 1149.1), in-system programmable | — |
| Configuration Memory | Non-volatile EEPROM (instant-on, no boot PROM) | — |
| 動作温度 | 0C to +70C (commercial) | 0C to +70C (commercial) |
| RoHS ステータス | Non-RoHS (legacy 5V part) | [DATA_NEEDED: RoHS status - not stated in verified data] |
| 実装タイプ | Surface Mount / Socketed (PLCC-84 socket) | Surface Mount (PLCC socket or direct solder) |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements / Gates | — | 2500 usable gates |
| User I/O Pins | — | 68 |
| Number of Logic Array Blocks (LABs) | — | 8 |
| Setup Time (tSU) | — | 7 ns |
| Maximum Operating Frequency | — | 125 MHz (counter) |
| I/O Voltage (MultiVolt) | — | 2.5 V / 3.3 V / 5.0 V |
| Program Memory Type | — | EEPROM (in-system programmable) |
| JTAG Support | — | IEEE Std 1149.1 boundary-scan |