EPM7256AETC100-5C vs EPM7256AEFC100-7 比較
詳細な並列比較: EPM7256AETC100-5C メーカー: Altera および EPM7256AEFC100-7 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM7256AETC100-5C - MAX 7000 CPLD, 256 Macrocells, 84 I/O, TQFP-100 | Altera
EPM7256AETC100-5C Obsolete
仕様比較
| パラメータ | EPM7256AETC100-5C | EPM7256AEFC100-7 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $48.90 | $15.20 |
| Product Family | MAX 7000A | — |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 256 | — |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/O | 84 | — |
| Usable Gates (typical) | 6400 | — |
| Propagation Delay (tPD) | 5 ns | 7.5 ns |
| Maximum Counter Frequency (fCNT) | 200 MHz | — |
| パッケージ | TQFP-100 | 100-pin FBGA (11x11 mm) |
| 実装タイプ | Surface Mount | Surface Mount (FBGA) |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | — |
| I/O Voltage (MultiVolt) | 2.5 V / 3.3 V / 5.0 V compatible | — |
| Programming Technology | EEPROM (in-system programmable via JTAG) | — |
| JTAG Support | IEEE Std. 1149.1 boundary-scan | — |
| 動作温度 | 0 °C to +70 °C (commercial) | 0C to +90C (commercial) |
| RoHS ステータス | Non-compliant (Pb-bearing TQFP package) | [DATA_NEEDED: rohs status] |
| Lead-Free | No | — |
| Family | — | MAX 7000A |
| Macro Cells | — | 256 |
| Usable Gates | — | 5,000 |
| Logic Array Blocks | — | 16 |
| User I/Os | — | 84 |
| ピン数 | — | 100 |
| Supply Voltage - VCCINT | — | 3.0 V to 3.6 V |
| Supply Voltage - VCCIO | — | 2.5 V, 3.3 V, or 5 V (MultiVolt) |
| Internal Toggle Rate | — | 250 MHz |
| Maximum Operating Frequency | — | 126.6 MHz |
| Programmable Type | — | In-System Programmable (EEPROM) |
| Programming Interface | — | IEEE 1149.1 JTAG |
| MSLレベル | — | [DATA_NEEDED: msl level] |