EPM9560RC304-10 vs EPM9560RC304-2 比較
詳細な並列比較: EPM9560RC304-10 メーカー: Intel および EPM9560RC304-2 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Intel
EPM9560RC304-2 - MAX 9000 EPLD 12k Gates 304-pin RQFP | Intel / Altera
EPM9560RC304-2 Obsolete仕様比較
| パラメータ | EPM9560RC304-10 | EPM9560RC304-2 |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $17.60 | $55.00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD / EPLD | CPLD (EPLD - Erasable PLD) |
| Macrocells | 560 | [DATA_NEEDED: macrocell count] |
| Usable Gates | 16000 | Approximately 12,000 |
| Logic Elements | 560 | — |
| パッケージ | RQFP-304 (RC) | 304-pin RQFP (RC) |
| ピン数 | 304 | — |
| Pin-to-Pin Propagation Delay | 12 ns | — |
| Speed Grade | -10 | -2 |
| 電源電圧 | 5 V | — |
| 動作温度 | [DATA_NEEDED: operating temperature range] | Commercial (0C to +70C) |
| User I/O Pins | 304 (package-limited) | 304 |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | — |
| Programming Method | JTAG in-system (ISP) | — |
| Process Technology | 0.65 µm CMOS EEPROM | — |
| 実装タイプ | Surface Mount | Surface Mount |
| MSLレベル | 3 (168 Hours) | — |
| RoHS ステータス | ROHS3 Compliant | [DATA_NEEDED: RoHS compliance status] |
| Logic Array Blocks (LABs) | — | 16 |
| Core Supply Voltage | — | 5.0 V |
| I/O Supply Voltage | — | 5.0 V |
| Programming Technology | — | EEPROM (in-system programmable) |
| JTAG Support | — | IEEE Std. 1149.1 (boundary-scan + ISP) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Architecture | — | Multiple Array MatriX (MAX) - third generation |
| Configuration Memory | — | On-chip EEPROM (non-volatile) |