EPM9560RI208-20N vs EPM9560RI208-15 比較
詳細な並列比較: EPM9560RI208-20N メーカー: Intel および EPM9560RI208-15 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM9560RI208-20N | EPM9560RI208-15 |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.00 | $20.10 |
| Device Family | MAX 9000 | — |
| Usable Gates | 12,000 | — |
| Macrocells | 560 | 560 |
| Pin-to-Pin Delay | 20 ns (-20 speed grade) | — |
| Counter Speed | 100 MHz | — |
| 電源電圧 | 5.0 V | — |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | Yes (JTAG / IEEE 1149.1) |
| パッケージ | 208-pin RQFP | — |
| 実装タイプ | Surface Mount | — |
| 動作温度 | Industrial (-40C to +85C) | 0 °C to 70 °C (industrial grade; per package suffix R) |
| Development Tool | MAX+PLUS II | — |
| Design Entry | Schematic, VHDL, Verilog HDL, AHDL | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | ROHS3 Compliant |
| Packaging | Tray | — |
| Logic Architecture | Third-generation MAX (Multiple Array MatriX) | — |
| Fabrication Process | Advanced CMOS | — |
| Family | — | MAX 9000 |
| Architecture | — | CMOS EEPROM-based Multiple Array MatriX (MAX) |
| Typical Usable Gates | — | 12,000 |
| User I/Os | — | 153 |
| Internal Frequency (max) | — | 145 MHz |
| Propagation Delay (tPD) | — | 11.4 ns (commercial); 15 ns speed grade |
| Logic Family | — | CMOS |
| ピン数 | — | 208 |
| Package Code | — | HFQFP (Power Quad Flat Pack, gull-wing) |
| Package Type | — | RQFP-208 |
| Supply Voltage (VCC) | — | 5 V nominal (4.5 V to 5.5 V) |
| I/O Voltage Support | — | 3.3 V or 5 V multi-volt I/O |
| Boundary-Scan (JTAG) | — | Compliant |
| Configuration Memory | — | On-chip EEPROM (non-volatile) |
| 湿気感度レベル（MSL） | — | 3 (168 hours) |