IPB021N10NM5LF2ATMA1 vs IPD50N04S408ATMA1 比較

詳細な並列比較: IPB021N10NM5LF2ATMA1 メーカー: Infineon および IPD50N04S408ATMA1 メーカー: Infineon。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。

Infineon
IPB021N10NM5LF2ATMA1 IPB021N10NM5LF2ATMA1 - 100V 2.1mΩ Linear FET MOSFET | Infineon

IPB021N10NM5LF2ATMA1 - 100V 2.1mΩ Linear FET MOSFET | Infineon

IPB021N10NM5LF2ATMA1 ✓ 生産中
Infineon
IPD50N04S408ATMA1 IPD50N04S408ATMA1 - 40V 50A N-Ch OptiMOS-T2 MOSFET | Infineon

IPD50N04S408ATMA1 - 40V 50A N-Ch OptiMOS-T2 MOSFET | Infineon

IPD50N04S408ATMA1 ✓ 生産中

仕様比較

パラメータ IPB021N10NM5LF2ATMA1 IPD50N04S408ATMA1
ブランド Infineon Infineon
カテゴリ MOSFETs MOSFETs
ライフサイクル状態 有効 有効
在庫状況 In Stock In Stock
単価(USD) $2.75 $0.69
Manufacturer Infineon Technologies Infineon Technologies
Part Family OptiMOS 5 Linear FET 2 —
Polarity / Channel Type N-Channel —
Drain-Source Voltage (V_DS) 100 V —
Continuous Drain Current (I_D) at T_C=25°C 176 A —
Continuous Drain Current (I_D) at T_A=25°C 30 A —
R_DS(on) Maximum 2.1 mΩ —
Gate-Source Voltage (V_GS) Maximum ±20 V [DATA_NEEDED: absolute max rated V_GS] —
Gate Threshold Voltage (V_GS(th)) [DATA_NEEDED: V_GS(th) typical/min] —
Power Dissipation (P_D) at T_C=25°C 375 W —
Power Dissipation (P_D) at T_A=25°C 3.8 W —
動作温度範囲 -55°C to +175°C [DATA_NEEDED: confirm from datasheet operating junction range] -55 °C to +175 °C
パッケージ PG-TO263-3-2 (D2PAK, surface mount, 3 pins + tab) PG-TO252-3-313 (DPAK)
実装タイプ Surface Mount Surface Mount
Drive Voltage (Max R_DS(on), Min R_DS(on)) 10 V, 15 V —
Technology OptiMOS 5 trench-gate MOSFET (Linear FET optimized) —
RoHS ステータス Compliant —
MSLレベル [DATA_NEEDED: confirm MSL rating from manufacturer datasheet] MSL1 (260 °C peak reflow)
Product Family — OptiMOS-T2
Polarity — N-Channel
Mode — Enhancement-mode
Drain-Source Voltage (V DS) — 40 V
Continuous Drain Current (I D, Tc) — 50 A
Power Dissipation (P D, Tc) — 46 W
Automotive Qualification — AEC-Q101
Avalanche Tested — 100 % Avalanche tested
Green Package (RoHS) — RoHS compliant
Gate Threshold Voltage (V GS(th)) — [DATA_NEEDED: V GS(th) typical]
On-State Resistance (R DS(on)) — [DATA_NEEDED: R DS(on) at V GS = 10 V]
Total Gate Charge (Q G) — [DATA_NEEDED: Q G typical]

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