IRS2008STRPBF vs IRS2153DSPBF 比較
詳細な並列比較: IRS2008STRPBF メーカー: Infineon および IRS2153DSPBF メーカー: Infineon。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | IRS2008STRPBF | IRS2153DSPBF |
|---|---|---|
| ブランド | Infineon | Infineon |
| カテゴリ | Power MOSFET Drivers | Power MOSFET Drivers |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.33 | $0.98 |
| Manufacturer | Infineon Technologies | — |
| Part Number | IRS2008STRPBF | — |
| 機能 | Half-Bridge Gate Driver | Half-bridge gate driver with RC input oscillator |
| Driven Configuration | Half-Bridge (High-Side + Low-Side, synchronous) | — |
| Channel Type | Synchronous (independent inputs) | — |
| 出力数 | 2 (high-side + low-side) | 2 (HO, LO) |
| 出力タイプ | Non-Inverting | — |
| Logic Input Compatibility | TTL/CMOS | — |
| Input Voltage (VCC) | 10 V to 20 V (per datasheet family) | — |
| Maximum Offset Voltage (Voffset) | 200 V | 600 V |
| Source Current (typ.) | 0.29 A | — |
| Sink Current (typ.) | 0.6 A | — |
| Rise Time (typ.) | [DATA_NEEDED: rise time ns] | — |
| Fall Time (typ.) | [DATA_NEEDED: fall time ns] | — |
| Propagation Delay (typ.) | [DATA_NEEDED: propagation delay ns] | — |
| VCC UVLO Threshold | Yes (per datasheet family) | — |
| VBS UVLO Threshold | Yes (per datasheet family) | — |
| Shutdown Pin (SD) | Yes (active logic-level shutdown) | — |
| 動作温度 | -40 C to +125 C (industrial) | -40 C to +125 C |
| パッケージ | 8-SOIC (SOIC N), 3.90 mm body width | 8-SOIC (SOIC-8) |
| 実装タイプ | Surface Mount (Tape & Reel) | Surface Mount |
| Lead Finish | Matte Tin (lead-free) | — |
| RoHS ステータス | Compliant | — |
| MSLレベル | [DATA_NEEDED: MSL rating] | — |
| Configuration | — | High-side + low-side driver, half-bridge |
| VCC Supply Voltage | — | 10 V to 20 V |
| VBS High-side Supply Voltage | — | VCC + 0.3 V (typical bootstrap) |
| Gate Drive Source Current (IO+) | — | 130 mA typical |
| Gate Drive Sink Current (IO-) | — | 270 mA typical |
| Rise Time (tr) | — | [DATA_NEEDED: tr] (typical ~100 ns) |
| Fall Time (tf) | — | [DATA_NEEDED: tf] (typical ~50 ns) |
| Internal Deadtime | — | ~1.2 us |
| Input Type | — | RC-input oscillator (no external PWM required) |
| Logic Polarity | — | Inverting / Non-inverting per channel |
| Undervoltage Lockout | — | Yes (VCC) |
| Technology | — | HVIC + latch-immune CMOS |