MCIMX286CVM4B vs MCIMX287CVM4B 比較
詳細な並列比較: MCIMX286CVM4B メーカー: NXP Semiconductors および MCIMX287CVM4B メーカー: NXP Semiconductors。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | MCIMX286CVM4B | MCIMX287CVM4B |
|---|---|---|
| ブランド | NXP Semiconductors | NXP Semiconductors |
| カテゴリ | Microcontrollers | Microcontrollers |
| ライフサイクル状態 | NRND | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $12.40 | $0.00 |
| Core | ARM926EJ-S (ARMv5TEJ, 32-bit) | — |
| Maximum CPU Frequency | 454 MHz | — |
| Core Count | 1 | 1 core |
| パッケージ | 289-MAPBGA (14x14 mm, 0.8 mm pitch) | — |
| 動作温度 | [DATA_NEEDED: operating temperature range] | — |
| 電源電圧 | 5 V typical input (with on-die DC-DC) | — |
| Memory Interface | 16-bit DDR2 / LPDDR with ECC | — |
| Display Controller | Integrated LCD controller up to WVGA | — |
| CAN Controllers | 2 (dual CAN - i.MX286 distinguishing feature) | — |
| USB | 2x USB 2.0 High-Speed (Host + Device PHYs) | — |
| Ethernet | 10/100 MAC with HP Auto-MDIX | — |
| Hardware Encryption | AES, SHA | — |
| Audio | I2S / S/PDIF interface | — |
| PWM Channels | 4 | — |
| 実装タイプ | Surface Mount (BGA) | Surface-mount ball grid array |
| RoHS ステータス | Compliant | [DATA_NEEDED: RoHS status] |
| MSLレベル | [DATA_NEEDED: MSL rating] | — |
| Family | i.MX28 Multimedia Applications Processors | — |
| Product Type | — | i.MX28 multimedia applications processor |
| Processor Core | — | ARM926EJ-S |
| Architecture | — | 32-bit |
| Maximum Processor Frequency | — | 454 MHz |
| Package Type | — | 289-pin MAPBGA |
| Package Dimensions | — | 14 mm x 14 mm |
| Manufacturer | — | NXP Semiconductors |
| ライフサイクル状態 | — | NRND |
| Integrated Functional Domains | — | Display, connectivity, real-time control, security, and networking |
| Target Product Class | — | Portable devices with rich, high-color user interfaces |
| ピン数 | — | 289 pins |
| Operating Voltage Range | — | [DATA_NEEDED: operating voltage range] |
| 動作温度範囲 | — | [DATA_NEEDED: operating temperature range] |
| Memory Interfaces | — | [DATA_NEEDED: memory interface configuration] |