P3041NSE1MMB vs P3041NXN1MMB 比較
詳細な並列比較: P3041NSE1MMB メーカー: NXP Semiconductors および P3041NXN1MMB メーカー: NXP Semiconductors。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
NXP Semiconductors
P3041NXN1MMB - QorIQ P3 Quad-Core 1.2GHz MPU | NXP Semiconductors
P3041NXN1MMB ✓ 生産中仕様比較
| パラメータ | P3041NSE1MMB | P3041NXN1MMB |
|---|---|---|
| ブランド | NXP Semiconductors | NXP Semiconductors |
| カテゴリ | Microcontrollers | Microcontrollers |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $215.00 | $215.00 |
| Manufacturer | NXP Semiconductors | — |
| Series | QorIQ P3 | — |
| Core Architecture | PowerPC e500mc | PowerPC e500mc |
| Number of Cores | 4 | 4 |
| データバス幅 | 32-bit | 32-bit |
| Maximum Core Frequency | 1.2 GHz | 1.2 GHz |
| 動作温度範囲 | 0 C to 105 C | -40C to +105C |
| Package Type | 1295-FCPBGA (37.5 mm x 37.5 mm) | — |
| 実装タイプ | Surface Mount | Surface Mount (BGA) |
| Memory Controller | DDR3/DDR3L with ECC [DATA_NEEDED: maximum supported frequency] | DDR3 / DDR3L with ECC (per product brief) |
| Encryption | Yes (encrypted secure boot, r1.1) | — |
| On-chip Crypto Acceleration | Yes (IPsec, SSL, SRTP) [DATA_NEEDED: throughput] | — |
| SerDes Lanes | [DATA_NEEDED: lane count and supported protocols] | — |
| Ethernet Interfaces | [DATA_NEEDED: number of SGMII/XAUI ports] | — |
| PCIe Support | Yes [DATA_NEEDED: number of lanes and generation] | — |
| USB Support | [DATA_NEEDED: USB version and host/device role] | — |
| Process Node | [DATA_NEEDED: lithography node] | — |
| Typical Power Consumption | [DATA_NEEDED: TDP in W] | — |
| RoHS ステータス | Compliant (lead-free PBGA) | Compliant (BGA solder-ball lead-free per NXP product family) |
| Family | — | QorIQ P3 |
| パッケージ | — | 1295-FCPBGA (FCBGA, 37.5x37.5 mm) |
| Encryption Acceleration | — | NonENC (no SEC engine) |
| Product Variant | — | r1.1 silicon revision |
| High-Speed I/O | — | Multiple SerDes lanes for 10 GbE, GbE, PCIe (per family) |
| Process Technology | — | [DATA_NEEDED: process node] |
| Supply Voltage (Core) | — | [DATA_NEEDED: Vdd_core] |