P5010NSN1QMB vs P5010NXN1QMB557 比較
詳細な並列比較: P5010NSN1QMB メーカー: NXP Semiconductors および P5010NXN1QMB557 メーカー: NXP Semiconductors。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
NXP Semiconductors
P5010NSN1QMB - QorIQ P5010 SoC, 64-bit Power Arch, 2.0GHz, 1295-FCBGA | NXP
P5010NSN1QMB ✓ 生産中NXP Semiconductors
P5010NXN1QMB557 - QorIQ P5 2GHz 64-Bit MPU | NXP 1295-FCPBGA
P5010NXN1QMB557 ✓ 生産中仕様比較
| パラメータ | P5010NSN1QMB | P5010NXN1QMB557 |
|---|---|---|
| ブランド | NXP Semiconductors | NXP Semiconductors |
| カテゴリ | Microcontrollers | Microcontrollers |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $318.25 | $129.60 |
| Architecture | Power Architecture e5500 (64-bit) | — |
| Core Count | 1 core | — |
| Maximum Core Frequency | 2.0 GHz | 2.0 GHz |
| Cache (L1 Instruction per core) | 32 KB | — |
| Cache (L1 Data per core) | 32 KB | — |
| Cache (L2 shared frontside) | 1 MB | — |
| Memory Controller | DDR3 with ECC support | — |
| PCIe | PCI Express Gen 2 controllers integrated | — |
| Ethernet | Dual Gigabit Ethernet | — |
| High-Speed Interconnect | Serial RapidIO (SRIO) | — |
| Hardware Acceleration | DPAA (Data Path Acceleration Architecture) engine | — |
| Security Engine | SEC crypto engine integrated | — |
| パッケージ | 1295-FCBGA (37.5 x 37.5 mm) | 1295-ball FCPBGA (37.5 x 37.5 mm) |
| 動作温度 | 0C to +105C | [DATA_NEEDED: operating temperature range] |
| Encryption | Hardware-accelerated | — |
| Manufacturer | — | NXP Semiconductors (formerly Freescale) |
| Series | — | QorIQ P5 |
| Core Architecture | — | PowerPC e5500, 64-bit |
| Number of Cores | — | 1 |
| External Data Bus Width | — | 64-bit |
| Address Bus Width | — | 16-bit (per Microchip USA listing) |
| Ball Pitch | — | 1.00 mm |
| JESD-30 Package Code | — | S-PBGA-B1295 |
| Process Technology | — | CMOS |
| Integrated Cache | — | Yes (L1 + L2) |
| Low-Power Mode Support | — | Yes |
| RoHS ステータス | — | Compliant |
| 実装タイプ | — | Surface Mount (BGA) |