RTAX1000S-1CGS624V vs RTAX1000SL-1CGS624V 比較
詳細な並列比較: RTAX1000S-1CGS624V メーカー: Microchip Technology および RTAX1000SL-1CGS624V メーカー: Microchip Technology。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Microchip Technology
RTAX1000S-1CGS624V - 1M-Gate Rad-Tolerant FPGA | Microchip
RTAX1000S-1CGS624V ✓ 生産中Microchip Technology
RTAX1000SL-1CGS624V - 1M-Gate Rad-Tolerant FPGA | Microchip
RTAX1000SL-1CGS624V ✓ 生産中仕様比較
| パラメータ | RTAX1000S-1CGS624V | RTAX1000SL-1CGS624V |
|---|---|---|
| ブランド | Microchip Technology | Microchip Technology |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.00 | $1.00 |
| Equivalent System Gates | 1,000,000 | — |
| Dedicated Logic Cells | 18144 | — |
| Cluster Logic Blocks (CLBs) | 12096 | — |
| Technology | CMOS, antifuse-based | — |
| Core Supply Voltage | 1.5 V | — |
| Family | RTAX-S (Radiation-Tolerant) | — |
| Programming Type | One-Time Programmable (antifuse) | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| パッケージ | CGS624 (624-ball ceramic column grid array) | — |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作温度 | -55C to +125C | -55C to +125C |
| Radiation Tolerance | Designed for space-flight radiation environments | Radiation-tolerant (space-flight qualified family) |
| Live at Power-Up | Yes (no external configuration device) | — |
| System Features | Segmentable clocks, chip-wide highway routing | — |
| Application Domain | Space-flight systems | — |
| RoHS ステータス | [DATA_NEEDED: RoHS Status] | [DATA_NEEDED: RoHS status] |
| I/O Standard Support | [DATA_NEEDED: I/O standards] | — |
| System Gates | — | 1,000,000 (1.00E6) |
| Logic Cells / Logic Blocks | — | 12096 |
| Logic Family | — | Digital CMOS |
| Programmable Technology | — | Antifuse (one-time programmable) |
| Package Type | — | CGA-624 (ceramic column grid array) |
| ピン数 | — | 624 |
| Speed Grade | — | -1 (standard) |
| SEU Immunity | — | SEU-hardened registers; SEU rate < 10-10 errors/bit-day |
| Configuration | — | Live at power-up, single chip, no external boot PROM |
| Clocking | — | Segmentable clock resources |
| Routing Features | — | Chip-wide highway routing, carry logic |
| 電源電圧 | — | [DATA_NEEDED: core/IO supply voltage] |