RTAX4000D-CQ352B vs RTAX2000D-1CQ352B 比較
詳細な並列比較: RTAX4000D-CQ352B メーカー: Microchip Technology および RTAX2000D-1CQ352B メーカー: Microchip Technology。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Microchip Technology
RTAX4000D-CQ352B - 4M-Gate Rad-Tolerant FPGA CQFP-352 | Microchip
RTAX4000D-CQ352B ✓ 生産中Microchip Technology
RTAX2000D-1CQ352B - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000D-1CQ352B ✓ 生産中仕様比較
| パラメータ | RTAX4000D-CQ352B | RTAX2000D-1CQ352B |
|---|---|---|
| ブランド | Microchip Technology | Microchip Technology |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.00 | $3,120.00 |
| Logic Cells | 55,440 | — |
| Configurable Logic Blocks (CLBs) | 36,960 | — |
| Equivalent Gates | 4,000,000 | — |
| System Gates (cells, per Jotrin listing) | 33,600 | — |
| Family | RTAX-DSP (RTAX-S/SL/DSP) | RTAX-S/SL and RTAX-DSP (RTAX2000D) |
| Process Technology | 0.15 um | — |
| Core Supply Voltage | 1.5 V (1.425 V to 1.575 V) | 1.5 V nominal (1.425 V to 1.575 V) |
| Combinatorial CLB Delay | [DATA_NEEDED: combinatorial CLB delay for standard speed grade; 0.99 ns max is specified for the -1 speed grade variant] | — |
| Technology Type | Antifuse, one-time programmable, radiation-tolerant | — |
| パッケージ | 352-pin Ceramic CQFP (CQFP-352) | 352-pin Ceramic Column Grid Array (CQ352) |
| 実装タイプ | Surface Mount | Surface Mount (ceramic column grid array) |
| Configuration | Live at power-up, single chip, no external configuration memory | Live at power-up, no external configuration device (antifuse) |
| Radiation Tolerance | Radiation-tolerant (space-flight qualified family) | — |
| Application Domain | Space flight systems | Space-flight, radiation-tolerant |
| Programmability | OTP (one-time programmable antifuse) | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | — |
| 動作温度 | [DATA_NEEDED: operating temperature range] | — |
| Technology | — | Antifuse (nonvolatile), Digital CMOS |
| Equivalent System Gates | — | 2,000,000 |
| CLBs (Logic Cells) | — | 19,712 CLBs / 29,568 logic cells (per family organization) |
| DSP Mathblocks | — | Up to 120 (18-bit x 18-bit MAC) |
| DSP Performance | — | 125 MHz 18-bit x 18-bit multiply-accumulate |
| Embedded Memory | — | Up to 540 kbits SRAM with optional EDAC |
| Total Ionizing Dose | — | 300 krad (Si) functional / 200 krad (Si) with operation |
| Speed Grade | — | -1 |
| Temperature Range | — | Commercial (C) |
| Routing Features | — | Segmentable clocks, chip-wide highway routing, carry logic |
| Embedded SRAM Features | — | Built-in FIFO control logic |