STM32G051K8T6 vs STM32G051K6T6 比較
詳細な並列比較: STM32G051K8T6 メーカー: STMicroelectronics および STM32G051K6T6 メーカー: STMicroelectronics。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
STMicroelectronics
STM32G051K6T6 - 64MHz Cortex-M0+ 32KB MCU | STMicroelectronics
STM32G051K6T6 ✓ 生産中仕様比較
| パラメータ | STM32G051K8T6 | STM32G051K6T6 |
|---|---|---|
| ブランド | STMicroelectronics | STMicroelectronics |
| カテゴリ | Microcontrollers | Microcontrollers |
| ライフサイクル状態 | 有効 | 有効 |
| Product Type | 32-bit ARM Cortex-M0+ microcontroller | 32-bit Arm Cortex-M0+ microcontroller |
| Series | STM32G0 mainstream series | — |
| CPU Core | Arm 32-bit Cortex-M0+ | — |
| Maximum CPU Frequency | 64 MHz | 64 MHz |
| Flash Memory | 64 KB | 32 KB (32K x 8) |
| Flash Organization | 64K x 8 | — |
| SRAM | 18 KB | 18 KB |
| SRAM Parity Support | 16 KB with hardware parity check | — |
| 動作電源電圧 | 1.7 V to 3.6 V | — |
| USART Count | 2 | 2 |
| ADC | Integrated | — |
| DAC | Integrated | — |
| Timer Resources | Integrated timers | — |
| Communication Interfaces | Integrated communication interfaces | — |
| パッケージ | 32-LQFP, 7 x 7 mm | 32-pin LQFP (7x7 mm) |
| 実装タイプ | Surface mount | Surface mount |
| 動作温度 | -40 °C to +85 °C / +105 °C / +125 °C across device variants | — |
| Flash Protection | Protected and securable area | [DATA_NEEDED: detailed flash protection and securable-area configuration] |
| RoHS ステータス | unknown | unknown |
| REACH Status | unknown | unknown |
| AEC-Q100 Qualification | unknown | not_applicable |
| Manufacturer | — | STMicroelectronics |
| Core Architecture | — | Arm Cortex-M0+ 32-bit RISC |
| Operating Voltage Range | — | 1.7 V to 3.6 V |
| Timer Support | — | General-purpose timers |
| Operating Temperature Options | — | -40°C to 85°C, -40°C to 105°C, or -40°C to 125°C depending on the device variant |
| Exact Temperature Grade of STM32G051K6T6 | — | [DATA_NEEDED: exact temperature grade for the T6 order code] |
| Digital Core Supply | — | VCORE, internally generated by an embedded linear voltage regulator |
| VREF+ Connection | — | Internally connected to VDD on packages without a VREF+ pin |
| Internal Reference Buffer Requirement | — | Must remain disabled when VREF+ is internally connected to VDD |