SY69952ZH vs SY69952ZC 比較
詳細な並列比較: SY69952ZH メーカー: Microchip Technology および SY69952ZC メーカー: Microchip Technology。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | SY69952ZH | SY69952ZC |
|---|---|---|
| ブランド | Microchip Technology | Microchip Technology |
| カテゴリ | Clock & Timing | Clock & Timing |
| ライフサイクル状態 | Unknown | Unknown |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.00 | $0.00 |
| Product Type | OC-3/STS-3 clock-recovering transceiver | OC-3/STS-3 clock-recovering transceiver |
| データレート | 155.52 Mbps | 155.52 Mbps |
| Output Count | 1 output | — |
| Input Interface | PECL | — |
| PLL | Yes | — |
| Recovery Architecture | Single-chip transmitter and receiver | — |
| Primary Applications | Ethernet, SONET/SDH, and ATM | — |
| Clock Generator Input Range | 6.41 MHz to 19.64 MHz | — |
| パッケージ | 28-pin SOIC, 7.50 mm width | 28-SOIC |
| Package Family | SOIC small-outline integrated-circuit package | — |
| Assembly Type | Through-hole | — |
| 動作温度 | [DATA_NEEDED: operating temperature range] | — |
| 電源電圧 | [DATA_NEEDED: supply voltage range] | [DATA_NEEDED: supply voltage] |
| Maximum Input Frequency | [DATA_NEEDED: maximum input frequency] | — |
| Output Electrical Standard | [DATA_NEEDED: output electrical standard] | — |
| Jitter Performance | [DATA_NEEDED: jitter specification] | — |
| Lock or Acquisition Time | [DATA_NEEDED: lock or acquisition time] | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| REACH Status | [DATA_NEEDED: REACH status] | [DATA_NEEDED: REACH status] |
| Clock Output Count | — | 1 output |
| Supported Lower Rate | — | 51.84 Mbit/s |
| Architecture | — | ATM-compatible single-chip transmitter and receiver |
| Application | — | Ethernet, SONET/SDH, and ATM applications |
| ピン数 | — | 28 pins |
| 実装タイプ | — | Surface mount |
| Processor Compatibility | — | PM5345, VNS67200, WAC-013-B/WAC-413-A, and NEC µPD98402 UNI processors |
| 動作温度範囲 | — | [DATA_NEEDED: operating temperature range] |
| Recovered-Clock Jitter | — | [DATA_NEEDED: recovered-clock jitter] |
| Input Data Recovery Limits | — | [DATA_NEEDED: input data recovery limits] |
| Logic Levels | — | [DATA_NEEDED: logic levels] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |