Analog Devices

AD678KD - 12-Bit 200 kSPS Sampling ADC | Analog Devices

部品番号: AD678KD ✓ 生産中
在庫あり 1〜3営業日以内に発送
Internal voltage reference Vdss 28-pin CDIP/SBCDIP Package Internal clock-generation circuitry Speed
開始価格 $134.8715 USD / 個
MOQ: 1 |
価格更新日: 2026-10-21
ボリューム価格
数量 単価 小計
1 $134.8715 $134.87
10 $134.8715 $1,348.72
100 $134.8715 $13,487.15
500 $134.8715 $67,435.75
1,000 $134.8715 $134,871.50
ℹ️ すべての価格はUSDです

AD678KD 概要

The Analog Devices AD678KD is a monolithic, complete sampling analog-to-digital converter with 12-bit resolution, a 200 kSPS sampling rate, and a 28-pin ceramic DIP package. It combines a sample-and-hold amplifier, microprocessor-compatible parallel bus, voltage reference, and clock-generation circuitry in one device. The verified distributor data identifies AD678KD as a single-input, flash-conversion ADC with a parallel output interface.

What is a complete sampling ADC? A sampling ADC captures an analog voltage with an internal sample-and-hold amplifier and converts that sample into a digital code. The AD678 belongs to the ADC hierarchy and integrates the sampling, conversion, reference, clock, and digital-interface functions needed for direct signal acquisition. This integration reduces the number of external components and makes the converter suitable for instrumentation, industrial control, communications, and measurement systems.

Key verified characteristics include 12-bit resolution, 200 kSPS operation, one analog input, flash architecture, parallel output, and a 28-pin CDIP/SBCDIP package. The AD678 is specified for dynamic parameters including signal-to-noise-plus-distortion ratio, total harmonic distortion, and intermodulation distortion. Those parameters are particularly relevant when the converter handles waveform acquisition or other signal-processing applications.

The device also includes a voltage reference and clock-generation circuitry, allowing it to operate as a more complete acquisition element than a bare flash-converter core. The Analog Devices product page states that the AD678 provides the same pinout as the 14-bit, 128 kSPS AD679 ADC, creating a documented upgrade path when a design requires related interface geometry and higher resolution at a lower sampling rate.

Typical uses include dynamic signal measurement, process monitoring, communications equipment, laboratory instrumentation, and industrial data-acquisition systems. The 200 kSPS rate is suitable for many high-speed measurement tasks, while the 12-bit code width establishes the digital resolution available to downstream processors.

A key design consideration is the distinction between a verified product-family relationship and a true drop-in replacement. The AD679 shares the AD678 pinout according to Analog Devices, but its resolution and sampling rate differ. Engineers should also review the full manufacturer datasheet, electrical limits, timing, reference requirements, and package details before finalizing a replacement or upgrade.

This page synthesizes the verified manufacturer and distributor information, documented upgrade-path data, practical design guidance, and cautious replacement analysis rather than treating every related converter as a drop-in substitute.

ドロップイン代替品: AD678KD — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。

クイック比較ツール — 並列比較する代替部品を選択:

AD679

✅ ドロップイン
📦 28-pin CDIP/SBCDIP
Same documented pinout as AD678, but resolution changes from 12 bit to 14 bit and sampling rate from 200 kSPS to 128 kSPS; conversion timing and system scaling require review

📋 参考代替品(カタログ未掲載)

AD678

✅ ドロップイン
📦 28-pin CDIP/SBCDIP
Same family and function, but the AD678KD ordering code must be checked for temperature, grade, and package-specific qualification before substitution

📋 参考代替品(カタログ未掲載)

AD678KD 最大定格&電気的特性

分解能 12 bit
サンプリングレート 200 kSPS
Input Count 1 input
Architecture Flash
Output Interface Parallel
パッケージ 28-pin CDIP/SBCDIP
実装タイプ Through Hole
Integrated Functions Sample-and-hold amplifier, microprocessor-compatible bus interface, voltage reference, and clock-generation circuitry
Input Type Single-ended
Voltage Reference Internal voltage reference
Clock Generation Internal clock-generation circuitry
MIL-STD-883 Version Available in compliant versions

AD678KD 28-pin cdip/sbcdip ピン配置ガイド

AD678KD (28-pin cdip/sbcdip パッケージ) のピン配置。 このアナログコンポーネントは、入力、出力、および電源ピンを備えています。オフセットナル、補償、イネーブルピンの設定については、メーカーのデータシートを参照してください。信号調整やアンプ回路に最適です。

AD678KD の 28-pin cdip/sbcdip パッケージピン配置図

詳細なピン配置データはありません: AD678KD.

詳細は データシート をご参照ください。

主な用途

AD678KD の用途: 6 件s: Dynamic Signal Acquisition, Industrial Process Monitoring, Communications Receiver Front End, Laboratory Measurement Equipment, Data-Acquisition Control Cards, Waveform Monitoring.

📈

Dynamic Signal Acquisition

The AD678KD fits dynamic signal-acquisition systems that need a complete 12-bit converter rather than a bare ADC core. Its verified 200 kSPS sampling rate provides a defined conversion rate, while the integrated sample-and-hold amplifier, voltage reference, and clock-generation circuitry reduce external support requirements. The parallel output can feed a microprocessor, FPGA, or digital signal-processing system without a serial-interface conversion stage. Designers should confirm acquisition time, input bandwidth, and exact SNR+D, THD, and IMD limits in the manufacturer datasheet for the particular signal amplitude and sampling frequency.

🏭

Industrial Process Monitoring

AD678KD can be used in industrial process-monitoring equipment when sensor outputs must be digitized for supervisory control, logging, or alarm decisions. The single-input, 12-bit architecture is appropriate for many slow-to-moderate process signals, and the 200 kSPS capability provides margin for sampling multiple acquisition sequences around a measurement event. The integrated reference and clock circuitry can simplify the analog front end, but grounding, isolation, input protection, and calibration remain important. Use the exact manufacturer electrical limits to select input conditioning and ensure the selected controller can latch the parallel output reliably.

🌐

Communications Receiver Front End

AD678KD may suit communications or IF-signal measurement blocks where a parallel ADC output and integrated sampling functions simplify interface timing. Its 200 kSPS sampling rate makes it useful for selected envelope, waveform, or intermediate-frequency measurement paths, although it is not characterized here as a high-frequency RF converter. The design should verify input bandwidth, aliasing, dynamic range, and acquisition settling against the exact datasheet values. A sampling clock and digital processor must be synchronized carefully to avoid timing errors or repeated-conversion artifacts.

🧪

Laboratory Measurement Equipment

AD678KD is a practical candidate for laboratory instruments that acquire repeatable waveforms and perform digital filtering, statistics, or compensation in a downstream processor. Its 12-bit resolution gives a defined code width, while the integrated voltage reference and sample-and-hold amplifier help establish a consistent measurement chain. The 200 kSPS rate is suitable for many general-purpose measurement channels, but accuracy depends on input conditioning, reference behavior, source impedance, and PCB layout. Verify the package's through-hole pinout and thermal limits in the manufacturer datasheet before creating a new board.

🖥️

Data-Acquisition Control Cards

AD678KD can be used in a data-acquisition card where a controller must receive sampled values over a parallel bus. The converter's single-input organization simplifies multiplexing when paired with an external analog switch, while its complete sampling architecture avoids the need for a separate sample-and-hold stage in a basic channel. Because AD678KD is a 28-pin through-hole device, designers should preserve the documented footprint and pin numbering in legacy control-card designs. Check acquisition timing, input settling, logic levels, and software scaling against the final system clock.

📊

Waveform Monitoring

AD678KD is suitable for waveform-monitoring tasks that require moderate conversion speed and a parallel digital result, such as sampling a conditioned sensor waveform for peak, RMS, or spectral analysis. The 200 kSPS verified rate supports repeated samples at a known cadence, while 12-bit resolution provides 4096 digital code levels. The exact usable bandwidth is not established by the supplied snippets, so anti-alias filtering and front-end gain must be designed from the manufacturer specifications. The integrated reference and clock circuitry can simplify calibration, but system-level offset and gain error still require validation.

What is the Analog Devices AD678KD?
The AD678KD is a 12-bit, 200 kSPS complete sampling ADC in a 28-pin CDIP/SBCDIP package. According to the Analog Devices AD678 product information, it combines a sample-and-hold amplifier, microprocessor-compatible bus interface, voltage reference, and clock-generation circuitry in one monolithic device. DigiKey identifies the AD678KD as a single-input, flash-conversion ADC with a parallel output interface. It is intended for signal-processing systems that require integrated sampling and direct digital data acquisition.
What is the resolution and sampling rate of AD678KD?
The AD678KD provides 12-bit resolution and a maximum verified sampling rate of 200 kSPS. These two parameters define different aspects of conversion performance: resolution determines the number of digital bits available for each code, while sampling rate determines how many conversions can be performed per second. The verified distributor listing describes the AD678KD as a 12-bit, 200 kSPS ADC. Dynamic performance values such as SNR+D, THD, and IMD are specified for the family, but their exact AD678KD values were not provided in the supplied data.
Does AD678KD use a flash architecture?
Yes, the AD678KD uses a flash-conversion architecture according to the verified DigiKey and FindIC product descriptions. The AD678 is also described as a complete monolithic ADC rather than only a converter core. Its integrated sample-and-hold amplifier, voltage reference, clock-generation circuitry, and microprocessor-compatible parallel bus make it suitable for direct acquisition systems. Exact conversion timing and internal comparator details should be confirmed in the manufacturer datasheet before using the device for a new design.
What package does AD678KD use?
The AD678KD is supplied in a 28-pin CDIP/SBCDIP through-hole package. The verified distributor data specifically describes it as a 28-CDIP or 28-pin SBCDIP, with a ceramic DIP format. The package is not a modern fine-pitch surface-mount package, so a replacement must match the 28-pin through-hole footprint and verify all electrical and timing requirements. The manufacturer datasheet remains the authority for pin names, pin orientation, dimensions, and thermal characteristics.
Is AD678KD pin-compatible with AD679?
The Analog Devices product page explicitly states that the AD678 provides the same pinout as the 14-bit, 128 kSPS AD679 ADC. This makes AD679 a documented same-family upgrade-path consideration rather than a claim of identical specifications. AD679 changes the resolution to 14 bits and the sampling rate to 128 kSPS, so software scaling, timing, bandwidth, and system-performance assumptions must be reviewed. The relationship is documented, but full replacement suitability still depends on the complete AD679 datasheet and application requirements.
What can replace AD678KD as a drop-in ADC?
No verified cross-manufacturer drop-in replacement for AD678KD was identified in the supplied data. The Analog Devices product page confirms a same pinout relationship with the AD679, but AD679 is not electrically identical: it is specified as 14-bit and 128 kSPS instead of 12-bit and 200 kSPS. Therefore, engineers should treat AD679 as a documented family upgrade path and verify timing, interface behavior, supply requirements, and firmware before substitution. No cross-brand part should be considered drop-in without a verified 28-pin pinout and parameter comparison.
AD678KD vs AD679: which converter should I choose?
Choose AD678KD when the design requires the verified 12-bit resolution and 200 kSPS sampling rate. Choose AD679 when the application benefits from its documented 14-bit resolution and 128 kSPS sampling rate, while accepting the lower conversion rate. Both are identified by Analog Devices as sharing the same pinout, which can simplify hardware reuse. They are not identical specifications, so the decision must also consider acquisition bandwidth, controller timing, output-code interpretation, and system latency.
What are the key specifications of AD678KD engineers should know?
The AD678KD key verified specifications are 12-bit resolution, 200 kSPS sampling rate, one input, flash architecture, parallel output, and a 28-pin CDIP/SBCDIP package. It integrates a sample-and-hold amplifier, voltage reference, clock-generation circuitry, and a microprocessor-compatible bus. According to the Analog Devices product page, the AD678 also supports an upgrade path to the same-pinout AD679. Exact SNR+D, THD, IMD, supply limits, timing, and temperature data were not included in the supplied verified results.
Where can I download the AD678KD datasheet PDF?
The official Analog Devices datasheet PDF is available at https://www.analog.com/media/en/technical-documentation/data-sheets/AD678.pdf. The Analog Devices product page at https://www.analog.com/en/products/ad678.html provides family-level information and identifies the AD678's relationship to the AD679. A distributor-hosted copy is also listed by AllDataSheet, but the manufacturer PDF should be preferred for design work because it is the authoritative source for specifications, pinout, timing, and ordering information.
Where can I find the AD678KD pinout?
The AD678KD pinout should be obtained from the official Analog Devices AD678 datasheet at https://www.analog.com/media/en/technical-documentation/data-sheets/AD678.pdf. The supplied verified results confirm a 28-pin CDIP/SBCDIP package and state that the AD678 shares the AD679 pinout, but they do not provide the complete numbered pin list. Because this page does not invent pin names or pin numbers, the manufacturer datasheet is required before PCB assembly, socket replacement, or schematic verification.
How much does AD678KD cost and is it available?
The verified LCSC result lists AD678KD at $134.8715 and describes the part as in stock. The supplied data does not provide separate distributor price breaks, so the available tiers retain that exact listed price as a reference as of 2026-10-22. DigiKey, Mouser, and Octopart pages are listed for purchasing and availability checks, but their live quantities and prices were not included in the supplied snippets. Confirm current inventory, authorized sourcing, and lead time before placing an order.
Where can I buy AD678KD online?
AD678KD can be checked through the listed DigiKey, LCSC, Win Source, and Octopart purchasing links. The verified LCSC listing states that the part is in stock and gives a price of $134.8715. DigiKey describes the product as a 12-bit, one-input, flash ADC in a 28-CDIP package. Availability can change rapidly for legacy through-hole components, so the distributor page should be checked for current quantity, authorized status, and shipment timing as of 2026-10-22.
What is the lead time for AD678KD?
The supplied data does not provide a verified numeric lead time for AD678KD. The LCSC result says the part is in stock, while DigiKey, Win Source, and Octopart pages provide purchasing channels, but their current lead-time fields were not included. For a production decision, request a written lead-time confirmation from the selected authorized distributor and account for possible inventory changes on legacy ceramic-DIP devices. The stated in-stock status should not be treated as a guaranteed allocation for a future order.
Is AD678KD suitable for signal-processing instrumentation?
Yes, AD678KD is suitable for many signal-processing instrumentation applications because it is a complete 12-bit sampling ADC rated at 200 kSPS and includes the sample-and-hold amplifier, reference, clock, and parallel interface. The AD678 is specifically described for dynamic specifications such as SNR+D, THD, and IMD. Suitability still depends on the required input bandwidth, signal level, reference accuracy, acquisition time, controller timing, and total harmonic distortion limits, which should be checked against the full manufacturer datasheet.
Is AD678KD RoHS or REACH compliant?
The supplied verified web data does not state AD678KD's RoHS or REACH compliance status. One comparison listing includes RoHS as NN, but that field is not sufficiently authoritative or fully qualified to treat as a definitive compliance declaration. Accordingly, RoHS and REACH are marked unknown on this page. For procurement or regulatory documentation, request the current manufacturer declaration or the exact compliance statement associated with the AD678KD ordering code.
Can AD678KD be used in a military system?
The Analog Devices product page states that AD678 is available in versions compliant with MIL-STD-883 and directs engineers to the military-products databook or current AD678/883B data sheet for detailed specifications. That statement applies to available AD678 versions, not automatically to every AD678KD order code. For a military design, verify the exact ordering code, screening level, temperature grade, radiation or reliability requirements, documentation, and traceability with Analog Devices before procurement.

エンジニアリング参考データ: AD678KD — 比較、設計ガイダンス、コンプライアンス情報。

選定ガイド

Choose AD678KD when the design specifically needs a 12-bit, 200 kSPS complete sampling ADC and its 28-pin ceramic-DIP footprint. It is a sensible choice for legacy or industrial acquisition systems where the integrated sample-and-hold amplifier, reference, clock circuitry, and parallel interface simplify the signal chain. AD679 is preferable when the same-pinout hardware reuse is more important than retaining 200 kSPS, because it offers 14-bit resolution but only 128 kSPS sampling. Treat AD679 as a qualified design-review decision rather than a transparent drop-in replacement: verify timing, code handling, latency, input bandwidth, supply conditions, and software changes. For new designs requiring surface-mount packaging, lower cost, higher speed, or different compliance requirements, no verified replacement is established by the supplied data.

代替品との比較

パラメータ この製品 AD679 AD678
Package 28-pin CDIP/SBCDIP 28-pin CDIP/SBCDIP; same documented pinout 28-pin CDIP/SBCDIP; family/order-code verification required
Brand Analog Devices Analog Devices Analog Devices
Resolution 12 bit 14 bit 12 bit
Sampling Rate 200 kSPS 128 kSPS 200 kSPS

主な差別化要因

  • Documented same-pinout family upgrade path (vs AD679)
  • Higher verified conversion rate than the AD679 comparison (vs AD679)
  • Complete integrated conversion chain (vs AD679)

設計ノート

Begin with the manufacturer datasheet's supply-voltage and power-consumption limits; those values were not included in the supplied snippets. Because AD678KD integrates a voltage reference, sample-and-hold amplifier, and clock circuitry, the analog and digital supply rails must still be decoupled according to the datasheet layout guidance. Keep the reference and input paths away from high-current digital return paths, and verify that the controller's supply sequence does not violate the ADC's input limits.

Route the analog input, reference, and sample-and-hold-related connections away from the 12-bit parallel output bus. Keep the through-hole footprint and pin numbering consistent with the official AD678 datasheet; do not infer pin names from the AD679 relationship alone. Provide a clean return path beneath or around the converter, use short digital traces where practical, and place any external input protection or filtering close to the source while preserving the required acquisition bandwidth.

Do not treat the AD679 as an electrically identical replacement merely because Analog Devices states that the AD678 and AD679 have the same pinout. AD679 is documented as 14-bit and 128 kSPS, while AD678KD is 12-bit and 200 kSPS. Software code scaling, conversion timing, latency assumptions, and downstream filter behavior may change. Confirm the complete AD679 electrical specification and verify the exact PCB pinout before approving the substitution.

The parallel output bus creates a timing and grounding concern at the system level. Match the controller and ADC logic requirements, account for output timing and setup/hold margins, and avoid loading the outputs beyond the manufacturer's limits. If the acquisition clock is generated or distributed on the same board, separate clock routing from sensitive analog paths and evaluate crosstalk experimentally. Exact timing values are unavailable in the supplied data and must be taken from the manufacturer datasheet.

コンプライアンス情報

RoHS
Unknown
REACH
Unknown
AEC-Q100
Not Applicable
鉛フリー
Unknown
ハロゲンフリー
Unknown
紛争鉱物
Unknown

The supplied verified data states that AD678 versions are available compliant with MIL-STD-883, but it does not provide a definitive RoHS, REACH, lead-free, halogen-free, or conflict-minerals declaration for AD678KD. A comparison snippet lists RoHS as NN, but that field is not treated as an authoritative compliance statement.

データ検証日: 2026-10-22 — データはXAIPARTの部品エンジニアリングチームによって検証・管理されています

関連検索

AD678KD AD678KD datasheet Analog Devices AD678KD AD678KD 12-bit 200 kSPS ADC AD678KD 28-pin CDIP AD678KD parallel interface ADC AD678KD signal processing instrumentation AD678KD vs AD679 AD678KD drop-in replacement AD678KD price and availability AD678KD pinout AD678KD lead time AD678KD MIL-STD-883

関連部品&用語

Analog Devices AD678KD AD678 AD679 analog-to-digital converter ADC complete sampling ADC flash converter 12-bit resolution 200 kSPS parallel interface sample-and-hold amplifier voltage reference clock-generation circuitry 28-pin CDIP SBCDIP signal processing dynamic performance signal-to-noise-plus-distortion ratio total harmonic distortion intermodulation distortion MIL-STD-883 industrial instrumentation data acquisition
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