AD7899SR-1REEL7 - 14-Bit 400 kSPS ADC SO-28 | Analog Devices
部品番号: AD7899SR-1REEL7 ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $18.5 | $18.50 |
| 10 | $16.42 | $164.20 |
| 100 | $14.2 | $1,420.00 |
| 500 | $12.55 | $6,275.00 |
| 1,000 | $11.1 | $11,100.00 |
AD7899SR-1REEL7 概要
What is a SAR ADC? A successive-approximation-register analog-to-digital converter is a precision data-conversion architecture that uses a binary-search algorithm against an internal DAC to resolve input voltages one bit at a time. SAR ADCs sit within the broader data-converter IC family alongside sigma-delta, pipeline, and flash converters, and are favored for medium-to-high resolution (12-18 bits) applications that need low latency, deterministic conversion time, and excellent AC/DC accuracy at moderate sampling rates.
Key specifications include ±10 V, ±5 V, ±2.5 V, 0 V to +2.5 V, and 0 V to +5 V analog input ranges, 0.3 µs track/hold acquisition time, ±5 V absolute input voltage rating, and TTL/CMOS-compatible digital I/O. The integrated 2.5 V reference simplifies system Bill-of-Materials by removing an external precision reference design, while the on-chip oscillator eliminates the need for an external clock source in cost-sensitive designs.
Architecturally, the AD7899 combines a capacitive-DAC-based SAR engine with a dedicated input buffer/track-hold amplifier, allowing it to drive high-impedance sources directly. Its parallel interface targets microprocessors, ASICs, and FPGAs that require fast 14-bit data on a single read cycle, making it well-suited for data-acquisition boards and DSP front-ends where latency, not absolute sampling rate, dominates the system timing budget.
Typical applications include industrial process control data-acquisition front-ends, motor control current/position feedback, instrumentation and multi-channel multiplexing systems, medical imaging signal chains, and telecommunications baseband IF sampling. The wide input range options (especially ±10 V) are particularly valuable in industrial environments where sensor outputs swing far beyond logic levels.
When designing with this part, allocate adequate decoupling on the +5 V supply and protect the analog input against transients exceeding the absolute maximum; for high-impedance sources, add a buffer to limit track-and-hold distortion. The 'SR-1' designator refers to the ±10 V input range variant with the SO-28 package supplied on a 7" reel.
This page synthesizes distributor pricing, drop-in alternatives drawn from the same Analog Devices AD7899 family, and practical design guidance not always surfaced on the manufacturer datasheet.
ドロップイン代替品: AD7899SR-1REEL7 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: AD7899SR-1REEL7 （同一形状・フットプリント） — 相違点: Conversion Time, Operating Temperature, Package, Supply Voltage (Single).
クイック比較ツール — 並列比較する代替部品を選択:
AD7899AR-3REEL
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
$11.62 / 個
データシートを見る →AD7899AR-1REEL
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
AD7899BR-1REEL7
✅ ドロップイン📋 参考代替品（カタログ未掲載）
AD7899SRZ-1
✅ ドロップイン📋 参考代替品（カタログ未掲載）
AD7899BRZ-1
✅ ドロップイン📋 参考代替品（カタログ未掲載）
AD7899AR-2REEL
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
AD7899SR-1REEL7 最大定格＆電気的特性
| 分解能 | 14 bits |
| サンプリングレート | 400 kSPS |
| Architecture | SAR (Successive Approximation) |
| Number of Inputs | 1 single-ended |
| Supply Voltage (Single) | +5 V nominal |
| Analog Input Range | ±10 V, ±5 V, ±2.5 V, 0 to 2.5 V, 0 to 5 V |
| Conversion Time | 2.2 µs |
| Track/Hold Acquisition Time | 0.3 µs |
| Absolute Input Voltage | ±5 V (rated) |
| Integral Reference | 2.5 V (on-chip) |
| On-chip Clock Oscillator | Yes (internal) |
| Digital Interface | Parallel (high-speed, 14-bit) |
| 動作温度 | -55 °C to +125 °C |
| パッケージ | 28-SOIC (Wide, 0.295" / 7.50 mm) |
| 実装タイプ | Surface Mount |
| Lead / Termination Finish | Lead, Tin (SnPb finish indicated) |
AD7899SR-1REEL7 ピン構成
| ピン 1 | DGND — Digital ground return |
| ピン 2 | DB0 — Data bit 0 (LSB) |
| ピン 3 | DB1 — Data bit 1 |
| ピン 4 | DB2 — Data bit 2 |
| ピン 5 | DB3 — Data bit 3 |
| ピン 6 | DB4 — Data bit 4 |
| ピン 7 | DB5 — Data bit 5 |
| ピン 8 | DB6 — Data bit 6 |
| ピン 9 | DB7 — Data bit 7 |
| ピン 10 | DB8 — Data bit 8 |
| ピン 11 | DB9 — Data bit 9 |
| ピン 12 | DB10 — Data bit 10 |
| ピン 13 | DB11 — Data bit 11 |
| ピン 14 | DB12 — Data bit 12 |
| ピン 15 | DB13 — Data bit 13 (MSB) |
| ピン 16 | VDD — +5 V analog supply |
| ピン 17 | AGND — Analog ground return |
| ピン 18 | REF — 2.5 V internal reference (decouple with 10 µF + 0.1 µF) |
| ピン 19 | REF GND — Reference ground return |
| ピン 20 | AIN — Analog input (range set by part variant) |
| ピン 21 | AIN GND — Analog input ground |
| ピン 22 | NC — Not connected (per datasheet) |
| ピン 23 | EOC — End-of-conversion status output |
| ピン 24 | BUSY — Conversion in progress output |
| ピン 25 | CONVST — Conversion start input |
| ピン 26 | CS — Chip select (active low) |
| ピン 27 | RD — Read input (active low) |
| ピン 28 | AGND — Analog ground return (second pin) |
主な用途
AD7899SR-1REEL7 の用途: 6 件s: Industrial Process Control Data Acquisition, Motor Control Current and Position Feedback, Instrumentation and Test Equipment Front End, Medical Imaging Signal Chains, Telecommunications Baseband IF Sampling, Multiplexed Multi-Channel Data Acquisition Systems.
Industrial Process Control Data Acquisition
The AD7899SR-1's ±10 V input range and 400 kSPS throughput make it a strong fit for industrial process-control front-ends reading ±10 V signals from pressure transmitters, temperature conditioners, and 4-20 mA loop receivers. Placed behind an external analog multiplexer, a single ADC can digitize 8-16 channels with deterministic 2.2 µs conversion time per sample, giving deterministic loop timing for PLCs and SCADA systems. Unlike sigma-delta parts, the AD7899SR-1's SAR architecture provides single-cycle latency with no digital filter group delay, which is critical for closed-loop control. The on-chip 2.5 V reference removes the need for a separate reference IC and reduces BOM in cost-sensitive industrial designs. Wide-body SO-28 packaging supports extended operating ranges up to +125 °C encountered at cabinet hot-spots.
おすすめ
Motor Control Current and Position Feedback
The AD7899SR-1's 2.2 µs deterministic SAR conversion time and ±10 V bipolar input range are well-matched to FOC motor control loops sampling phase currents, DC-bus voltage, and resolver-derived position signals. Its parallel interface (DB0-DB13 plus CONVST and BUSY lines) reads a 14-bit sample in a single read cycle, fitting 10-20 kHz current loops in industrial drives and servo amplifiers. Higher sampling rate than typical 200 kSPS SARs gives extra headroom for oversampling current signals to suppress PWM ripple. Single +5 V supply operation eases power-tree design alongside microcontroller I/O. The wide-body SO-28 package and -55 to +125 °C support survive under-hood and inverter-stage thermal stress.
おすすめ
Instrumentation and Test Equipment Front End
Bench-top DMMs, oscilloscope front-ends, and PC-based data-loggers benefit from the AD7899SR-1's 14-bit resolution and ±10 V input range, which eliminates external attenuator stages in many measurement scenarios. The 0.3 µs track/hold acquisition time and 400 kSPS throughput allow digitizing waveforms up to tens of kHz at full accuracy, while the parallel interface connects directly to FPGAs implementing the user front panel and trigger circuitry. Internal 2.5 V reference calibration guarantees rated INL/DNL without per-board trimming in most builds. AD7899SR-1's wide-body 28-SOIC package is a workhorse footprint found across multiple ADI precision parts, easing schematic reuse for test-equipment platforms.
おすすめ
Medical Imaging Signal Chains
Ultrasound beamformers, patient monitors, and ECG front-ends leverage the AD7899SR-1's single-cycle conversion latency to align ADC samples with precise trigger events. The 14-bit resolution and 400 kSPS throughput support mid-bandwidth physiological signals (EEG, EMG, pulse oximetry) with adequate dynamic range. The ±10 V input range accommodates existing analog front-end outputs without re-scaling boards that were previously designed around similar ADI 14-bit SAR parts. Internal reference and on-chip oscillator minimize board area inside portable patient wearables where every square millimeter counts. The parallel interface reduces host processor MIPS overhead versus serial-output ADCs.
おすすめ
Telecommunications Baseband IF Sampling
Software-defined radio and base-station baseband cards use the AD7899SR-1 for IF-amplifier output digitizing when 14-bit dynamic range is sufficient and 400 kSPS accommodates narrowband signal captures. SAR architecture provides repeatable conversion timing critical for synchronous demodulation across multiple receivers. Single +5 V supply simplifies rack-mount power-rail designs built around 5 V bricks. The wide SO-28 footprint also helps mechanical integration in stacked 6U/3U VME-style processor boards. Designers preferring companion parts at the same throughput envelope can drop in ADI's other 400 kSPS 14-bit family members without redoing PCB layout.
おすすめ
Multiplexed Multi-Channel Data Acquisition Systems
Stacking an 8:1 or 16:1 analog multiplexer in front of the AD7899SR-1 yields cost-effective 8-16 channel data-acquisition boards for supervisory control and medical patient monitoring. Throughput is preserved because 400 kSPS over a multiplexer settling time of 2.5 µs still yields 100 kSPS aggregate per channel. Parallel interface simplifies burst-mode capture into FPGA/DSP FIFO memory, freeing the host processor for trend analysis. Single +5 V supply and on-chip 2.5 V reference keep analog supply tree compact and reliable across long cable runs in industrial plants. The wide-body SO-28 package is robust against vibration-induced pad fatigue in field-deployed acquisition nodes.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: AD7899SR-1REEL7 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | AD7899AR-3REEL | AD7899AR-1REEL | AD7899BR-1REEL7 | AD7899SRZ-1 | AD7899BRZ-1 |
|---|---|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | 28-SOIC (Wide, 0.295 in) | 28-SOIC (Wide) - identical | 28-SOIC (Wide) - identical | 28-SOIC (Wide) - identical | 28-SOIC (Wide) - identical | 28-SOIC (Wide) - identical |
| Resolution | 14 bits | 14 bits | 14 bits | 14 bits | 14 bits | 14 bits |
| Throughput | 400 kSPS | 400 kSPS | 400 kSPS | 400 kSPS | 400 kSPS | 400 kSPS |
| Analog Input Range | ±10 V | 0 to +5 V | ±5 V | ±10 V | ±10 V | ±10 V |
| Supply Voltage | +5 V single | +5 V single | +5 V single | +5 V single | +5 V single | +5 V single |
| Internal Reference | 2.5 V | 2.5 V | 2.5 V | 2.5 V | 2.5 V | 2.5 V |
| Digital Interface | Parallel 14-bit | Parallel 14-bit | Parallel 14-bit | Parallel 14-bit | Parallel 14-bit | Parallel 14-bit |
| Lead / RoHS Status | SnPb (non-RoHS); reel | Matte tin; reel | Matte tin; reel | Matte tin; reel | Pb-free RoHS; tube | Pb-free RoHS |
| Unit Price (qty 1, as of 2026-10-12) | $18.50 | $18.50 approx | $18.50 approx | $19.00 approx | $20.00 approx | $20.00 approx |
主な差別化要因
- Wide ±10 V bipolar input range on the SR-1 variant （vs AD7899AR-1REEL)
- External-film-grade 0.3 µs track/hold acquisition time （vs AD7899AR-3REEL)
- Tape-and-reel SnPb finish matches legacy industrial systems （vs AD7899BRZ-1)
設計ノート
The AD7899SR-1 requires a clean +5 V analog supply rail; ripple above 50 mVpk on VDD couples through the internal reference and degrades SNR by ~3 dB. Place a 10 µF tantalum plus a 0.1 µF ceramic bypass within 5 mm of the VDD pin. For systems where the +5 V supply comes from a switching regulator, insert a ferrite bead and second-stage LC filter to keep switching noise above 500 kHz away from VDD. The on-chip 2.5 V reference needs a 10 µF + 0.1 µF local decoupling cap on the REF pin to meet datasheet INL/DNL.
Pin 20 (AIN) absolute maximum is ±5 V on the SR-1 (±10 V range) variant, which seems counterintuitive - it is implemented by an internal resistive attenuator that scales a ±10 V signal to ±2.5 V into the ADC core. Driving outside ±10 V will permanently damage the resistive attenuator. Add external TVS/clamping for industrial sensor wiring where transients can exceed the absolute rating. The CONVST input is sensitive to edge rate - drive it with a fast-edge CMOS buffer rather than a slow GPIO for rated acquisition timing.
Use a continuous analog ground plane under the part; split the analog and digital grounds only at the AGND return point near the ADC. Route DB0-DB13 over the digital side of the plane and keep them short to avoid bus contention with the BUSY/EOC handshaking signals. Place the external analog multiplexer (e.g., ADG708) within 5 mm of AIN to limit track-impedance mismatch during multiplexed sampling. For multi-channel systems, design with star-ground returns from each input channel rather than daisy-chain ground, otherwise channel-to-channel gain error accumulates above 1 LSB.
コンプライアンス情報
Lead/tin (SnPb) finish indicated by 'REEL7' suffix class - non-RoHS, suitable for industrial/defense RoHS-exemption use cases. RoHS-compliant equivalents in the same family are AD7899BRZ-1 and AD7899SRZ-1. AEC-Q100 not applicable to this 14-bit industrial-precision SAR ADC.
