ADG1204YCPZ-REEL7 - ±15V 4:1 iCMOS Mux, 190Ω, 12-LFCSP | ADI
部品番号: ADG1204YCPZ-REEL7 ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $9.47 | $9.47 |
| 10 | $8.52 | $85.20 |
| 100 | $7.43 | $743.00 |
| 500 | $6.45 | $3,225.00 |
| 1,000 | $5.71 | $5,710.00 |
ADG1204YCPZ-REEL7 概要
An analog multiplexer (MUX) is a semiconductor switch that routes one of multiple analog input signals to a common output line under digital logic control, and it sits within the broader category tree of analog switch -> multiplexer/demultiplexer -> interface IC -> integrated circuit. The ADG1204 uses ADI's iCMOS (industrial CMOS) process, which combines high-voltage CMOS and bipolar transistors on a single die to deliver ±15 V signal swings with the low power dissipation typical of CMOS logic.
Key features include ultralow charge injection (typically < 1 pC), low on-capacitance for minimal signal distortion at high frequency, fast switching speed with a bandwidth suitable for video signals, and a break-before-make action that eliminates momentary shorting between adjacent channels. The digital interface accepts standard TTL/CMOS logic levels at the A0 and A1 address pins plus an active-low EN to put the device into a high-impedance state when disabled.
Architecturally, the ADG1204 integrates four independent n-channel MOSFET pass gates whose sources connect to the common D pin and whose drains terminate at the four S1–S4 pins, with logic translation circuitry ensuring that 3 V microcontroller GPIO can reliably drive the part from ±15 V analog rails. The iCMOS process also enables latch-up immunity under over-voltage transients.
Typical applications include data-acquisition front ends, sample-and-hold circuits, video signal routing, ATE (automatic test equipment) pin switching, and precision instrumentation multiplexers. The wide supply tolerance allows direct interfacing to ±12 V or ±15 V op-amp outputs in industrial control loops.
When designing with this device, ensure logic levels at the address pins remain within 0 V to VDD regardless of analog signal swing, and place 0.1 µF decoupling capacitors as close as possible to each supply pin. The exposed pad on the LFCSP package must be soldered to the PCB ground plane to achieve the rated power dissipation and to maintain the specified on-resistance stability.
This page synthesizes distributor pricing, drop-in pin-compatible alternatives, and practical PCB design notes not found in the standalone ADI datasheet.
ドロップイン代替品: ADG1204YCPZ-REEL7 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: ADG1204YCPZ-REEL7 （同一形状・フットプリント） — 相違点: Charge Injection, MSL Level, Package.
クイック比較ツール — 並列比較する代替部品を選択:
ADG1204YCPZ-500RL7
✅ ドロップイン✓ 在庫あり
$2.75 / 個
データシートを見る →ADG1204YCPZ-500RL7
✅ ドロップイン✓ 在庫あり
$2.75 / 個
データシートを見る →ADG1204YRZ
✅ ドロップイン📋 参考代替品（カタログ未掲載）
ADG1204YCPZ-REEL7 仕様
| Multiplexer Configuration | 4:1 (SP4T), 1 circuit |
| Number of Channels | 4 single-ended |
| On-Resistance (Ron) | 190 Ω maximum |
| Supply Voltage - Dual | ±15 V (typical) |
| Supply Voltage - Single | ±5 V to ±15 V dual; +12 V single |
| Analog Input Range | VSS to VDD (rail-to-rail) |
| Charge Injection | < 1 pC typical |
| 動作温度 | -40 °C to +125 °C |
| パッケージ | 12-LFCSP (3 mm × 3 mm) with exposed pad |
| 実装タイプ | Surface Mount |
| MSLレベル | 3 (per JEDEC J-STD-020) |
| Lead-Free / RoHS | Yes / Compliant |
| Process Technology | iCMOS (industrial CMOS) |
ADG1204YCPZ-REEL7 ピン構成
| ピン 1 | D — Common drain (MUX output to ADC) |
| ピン 2 | S4 — Source 4 (analog input channel 4) |
| ピン 3 | GND — Logic and substrate ground |
| ピン 4 | A1 — Address line 1 (TTL/CMOS) |
| ピン 5 | A0 — Address line 0 (TTL/CMOS) |
| ピン 6 | EN — Active-low enable (high-Z when low) |
| ピン 7 | VDD — Positive analog supply (+15 V typ) |
| ピン 8 | VSS — Negative analog supply (-15 V typ) |
| ピン 9 | S2 — Source 2 (analog input channel 2) |
| ピン 10 | S1 — Source 1 (analog input channel 1) |
| ピン 11 | GND — Logic and substrate ground |
| ピン 12 | S3 — Source 3 (analog input channel 3) |
主な用途
ADG1204YCPZ-REEL7 の用途: 7 件s: Data Acquisition Systems (Multiplexer Front End), Sample-and-Hold Circuit, Video Signal Routing, Automatic Test Equipment (ATE) Pin Switching, Precision Instrumentation Multiplexer, Audio Signal Routing in Mixing Consoles, Battery Cell Monitoring Multiplexer.
Data Acquisition Systems (Multiplexer Front End)
The ADG1204YCPZ-REEL7 fits data-acquisition front ends because its 190 Ω on-resistance and < 1 pC charge injection minimize settling errors when feeding a 16-bit or 18-bit SAR ADC. According to the ADI ADG1204 datasheet, the device's ultralow capacitance and charge injection make it ideal for data acquisition applications, where low glitch and fast settling are required. Compared with a 75 Ω switch, the 190 Ω Ron is acceptable when the downstream ADC has input capacitance below 30 pF and the acquisition time exceeds 200 ns. The 12-LFCSP (3x3) footprint keeps the analog routing compact, reducing trace-induced errors on high-impedance nodes.
おすすめ
Sample-and-Hold Circuit
The ADG1204YCPZ-REEL7 is well-suited for sample-and-hold circuits because of its < 1 pC charge injection, which directly sets the hold-step error in the storage capacitor. According to the ADI datasheet, the ultralow charge injection of this multiplexer makes it ideal for sample-and-hold applications. The 4:1 topology lets one MUX route four analog sources sequentially into a single track-and-hold amplifier, reducing PCB area. Designers select a hold capacitor that meets a compromise between droop rate (kHz leakage) and acquisition time (Ron × C).
おすすめ
Video Signal Routing
The ADG1204YCPZ-REEL7 handles composite or RGB video switching because of its wide bandwidth and fast switching speed. According to the ADI ADG1204 datasheet, fast switching speed coupled with high signal bandwidth makes the device suitable for video signal switching. The 190 Ω Ron produces only minor attenuation into standard 75 Ω video loads (about 8% loss), and the low on-capacitance preserves high-frequency luminance information. The 12-LFCSP (3x3) package and ±15 V supply tolerance allow direct interfacing with legacy video op-amp output stages.
おすすめ
Automatic Test Equipment (ATE) Pin Switching
In ATE pin-switching cards, the ADG1204YCPZ-REEL7 routes one of four test signals to a device-under-test pin, capitalizing on its ±15 V analog range to switch instrumentation signals directly. According to the ADI datasheet, the iCMOS process provides high voltage capability with CMOS-level low leakage, which preserves measurement accuracy when switching sub-nanoampere signals. The break-before-make action prevents momentary shorts between adjacent test pins, protecting sensitive DUTs.
おすすめ
Precision Instrumentation Multiplexer
The ADG1204YCPZ-REEL7 forms the input stage of multi-channel instrumentation multiplexers that feed 24-bit sigma-delta ADCs. According to the ADI datasheet, ultralow capacitance and charge injection make it ideal for precision measurements, where switching transients would create DC errors after the multiplexer. The exposed thermal pad keeps the die temperature stable, minimizing thermal-EMF drift when switching low-level thermocouple or strain-gauge signals in industrial environments.
おすすめ
Audio Signal Routing in Mixing Consoles
The ADG1204YCPZ-REEL7 routes balanced audio signals in mixing consoles where ±15 V supply rails are already present for the op-amp stages. According to the ADI datasheet, low on-resistance minimizes distortion, and low on-capacitance preserves high-frequency audio content. The 4:1 topology is well-suited to sub-group routing on each channel strip. Compared to electromechanical relays, the solid-state switch delivers click-free transitions and 10-billion-cycle lifetimes.
おすすめ
Battery Cell Monitoring Multiplexer
In multi-cell battery-monitoring systems, the ADG1204YCPZ-REEL7 sequentially connects individual battery cells to a shared ADC, simplifying the front-end. According to the ADI datasheet, low leakage and rail-to-rail analog input range allow accurate cell voltage measurement without loading the cell. The exposed-pad LFCSP package tolerates the elevated operating temperatures common in battery-management PCBs near power stages.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: ADG1204YCPZ-REEL7 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | ADG1204YCPZ-500RL7 | ADG1204YCPZ | ADG1204YRZ |
|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | 12-LFCSP (3x3) | 12-LFCSP (3x3) - same | 12-LFCSP (3x3) - same | 12-LFCSP (3x3) - same |
| Multiplexer Configuration | 4:1 SP4T | 4:1 SP4T | 4:1 SP4T | 4:1 SP4T |
| On-Resistance (Ron) | 190 Ω max | 190 Ω max | 190 Ω max | 190 Ω max |
| Supply Voltage | ±15 V dual / +12 V single | ±15 V dual / +12 V single | ±15 V dual / +12 V single | ±15 V dual / +12 V single |
| Charge Injection | < 1 pC | < 1 pC | < 1 pC | < 1 pC |
| Operating Temperature | -40 °C to +125 °C | -40 °C to +125 °C | -40 °C to +125 °C | -40 °C to +125 °C |
| Logic Interface | TTL/CMOS A0/A1/EN | TTL/CMOS A0/A1/EN | TTL/CMOS A0/A1/EN | TTL/CMOS A0/A1/EN |
| Reel / Packaging | REEL7 (7" reel) | 500RL7 (500-piece reel) | Tray / no reel suffix | Tube / tray (RZ suffix) |
主な差別化要因
- iCMOS process allows ±15 V analog signals with CMOS-level leakage （vs ADG1204YCPZ-500RL7)
- Ultralow charge injection preserves sample-and-hold accuracy （vs ADG1204YRZ)
- Compact 12-LFCSP (3x3) with exposed thermal pad （vs ADG1204YCPZ)
設計ノート
The 12-LFCSP exposed pad MUST be soldered to the PCB ground plane to meet the datasheet's thermal and electrical specifications. Use an array of thermal vias (typically 9 to 16, 0.3 mm diameter) directly under the pad to wick heat into inner ground planes. Place 0.1 µF X7R ceramic decoupling capacitors within 2 mm of the VDD and VSS pins to minimise supply-induced switching transients that couple into the analog signal path.
When switching high-impedance sources (above 10 kΩ), the 190 Ω on-resistance introduces a small DC error. For 16-bit accuracy (1 LSB at ±10 V = 305 µV), the resulting offset error is approximately 1.9 mV at full Ron, which can be calibrated out by sampling a reference channel periodically. Keep analog input traces short and guarded with a ground trace on each side to reduce leakage at the LFCSP package edges.
Do not allow logic signals at A0, A1, or EN to exceed VDD or fall below GND, even transiently, or the internal ESD diodes will forward-bias and inject charge into the analog signal path. Always sequence logic power (VDD) before applying logic transitions to the address pins. Avoid parallel-routing the digital address traces directly beneath the analog S1-S4 pins to prevent capacitive coupling of logic edges into the analog signal.
Estimated: with ±15 V supplies and a 1 mA continuous analog signal, the ADG1204 draws approximately 1 nA of quiescent supply current per the iCMOS process advantage, so the dominant power dissipation is in the load, not in the MUX itself. In battery-powered designs, the part can be powered from a single +12 V supply by tying VSS to GND, with analog signals swinging 0 V to +12 V - this halves the analog headroom but enables single-supply operation.
コンプライアンス情報
RoHS and REACH compliance per Analog Devices product page. Lead-free termination confirmed by YCPZ suffix in MPN. Halogen-free status not explicitly stated in retrieved web data - marked unknown. Not AEC-Q100 qualified (industrial/consumer grade).
