ADIN1140BCPZ - 10BASE-T1S Industrial MAC-PHY | Analog Devices
部品番号: ADIN1140BCPZ ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $4.5 | $4.50 |
| 10 | $4.1 | $41.00 |
| 100 | $3.2 | $320.00 |
| 500 | $2.7 | $1,350.00 |
| 1,000 | $2.24 | $2,240.00 |
ADIN1140BCPZ 概要
A MAC-PHY is an integrated circuit that combines the media access control (MAC) sublayer and the physical layer (PHY) transceiver in one device, communicating with a host processor over a standard serial interface instead of a parallel MII/RMII bus. In the network hierarchy, it sits between the host MCU (via SPI) and the single twisted-pair cable, offloading all Ethernet MAC functions and simplifying software stacks. The ADIN1140 implements the PLCA (Physical Layer Collision Avoidance) reconciliation sublayer defined in Clause 148 of IEEE 802.3-2022, which ensures deterministic, collision-free access on multidrop half-duplex 10BASE-T1S networks.
Key features include 10 Mbps single-pair operation over distances up to 25 m per segment in multidrop mode, low power consumption suited to battery-powered and densely populated industrial nodes, and a safe-state mode that can configure the SAIF (Serial Access Interface) pins into benign states for functional safety designs. The device supports IEEE 802.3cg multidrop networking, reducing cabling cost versus conventional fieldbuses.
Typical applications include industrial automation sensors and actuators, PLC I/O modules, building automation nodes, and multidrop sensor networks where low cost cabling and deterministic latency are required. The integrated MAC offloads the host MCU, allowing small microcontrollers to join Ethernet networks without heavy software MAC stacks.
Design consideration: the PLCA configuration (node ID, node count) must be set correctly for multidrop operation; incorrect node IDs cause silent network failures, so verify PLCA registers via the SPI interface during commissioning.
ドロップイン代替品: ADIN1140BCPZ — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
クイック比較ツール — 並列比較する代替部品を選択:
ADIN1140BCPZ-RL
✅ ドロップイン📋 参考代替品（カタログ未掲載）
ADIN1110BCPZ
⚡ 同一パッケージ ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
ADIN1140BCPZ 仕様
| インターフェース | SPI host interface |
| Network Standard | IEEE 802.3-2022 10BASE-T1S (Clause 148 PLCA) |
| データレート | 10 Mbps |
| Ports | 1 (single-port MAC-PHY) |
| トポロジー | Multidrop and point-to-point |
| Duplex | Half |
| パッケージ | 24-LFCSP (4x4 mm) |
| 実装タイプ | Surface Mount |
| PLCA Support | Yes (Clause 148 gRS) |
| Safe State Mode | Yes (SAIF configurable benign state) |
| Application | Industrial Ethernet connectivity |
ADIN1140BCPZ ピン構成
| ピン [DATA_NEEDED] | SPI SCLK — SPI clock from host |
| ピン [DATA_NEEDED] | SPI MOSI/SDI — SPI data from host to MAC-PHY |
| ピン [DATA_NEEDED] | SPI MISO/SDO — SPI data from MAC-PHY to host |
| ピン [DATA_NEEDED] | SPI CS — SPI chip select |
| ピン [DATA_NEEDED] | INT — Interrupt output to host |
| ピン [DATA_NEEDED] | RESET_N — Hardware reset, active low |
| ピン [DATA_NEEDED] | T1S_P — 10BASE-T1S line pair positive |
| ピン [DATA_NEEDED] | T1S_N — 10BASE-T1S line pair negative |
| ピン [DATA_NEEDED] | VDD — Supply voltage |
| ピン [DATA_NEEDED] | GND — Ground |
主な用途
ADIN1140BCPZ の用途: 6 件s: Industrial Automation Sensor Networks, PLC I/O Modules, Building Automation, Battery-Powered Industrial Devices, Robotics and Motion Control Nodes, Condition Monitoring and Diagnostics.
Industrial Automation Sensor Networks
The ADIN1140BCPZ fits industrial sensor nodes because its 10BASE-T1S multidrop topology allows many sensors on one twisted pair with up to 25 m per segment, cutting cabling cost versus point-to-point Ethernet. Its Clause 148 PLCA guarantees collision-free, deterministic access critical for control loops, while the integrated MAC offloads small MCUs via SPI. The low power design suits densely populated I/O installations. Place the ADIN1140 between the sensor MCU SPI bus and the SPE cable with proper magnetics; unlike RS-485 fieldbuses it delivers native IP connectivity with bounded latency.
おすすめ
PLC I/O Modules
PLC remote I/O modules benefit from the ADIN1140's integrated MAC-PHY architecture: the SPI host interface lets I/O processors join Ethernet networks without a full software MAC stack, reducing firmware complexity and memory footprint. PLCA timing provides deterministic input/output updates across the multidrop bus, and the safe-state mode can drive SAIF pins to predefined levels for fail-safe module behavior. Typical deployment connects the ADIN1140 SPI to the module MCU and the T1S pair to a multidrop backplane or daisy-chained cabinet wiring, achieving 10 Mbps with bounded cycle times.
おすすめ
Building Automation
Building automation nodes such as HVAC controllers, lighting gateways, and access-control panels use the ADIN1140BCPZ to replace legacy buses with IP-native single-pair Ethernet. The 10 Mbps rate and 25 m multidrop segments match structured building wiring distances, while the low quiescent power helps meet energy budgets. The integrated PLCA removes the software complexity of CSMA/CD collision handling on shared segments. Designers typically connect the SPI host interface to a low-cost MCU and power nodes over auxiliary pairs, achieving converged IT/OT networking without rewiring.
おすすめ
Battery-Powered Industrial Devices
The ADIN1140's low-power design makes it suitable for battery-operated and energy-harvesting industrial endpoints that still require Ethernet connectivity. Because the MAC functions are integrated in silicon rather than executed in software, the host MCU can sleep longer, reducing overall system energy. Its 10 Mbps SPE link draws far less power than 100 Mbps or 1 Gbps PHYs. Combined with a low-Iq buck regulator, a sensor node can sustain network attachment for extended periods, transmitting on demand via PLCA-assigned slots rather than continuous polling.
おすすめ
Robotics and Motion Control Nodes
In robotics cells and distributed motion systems, the ADIN1140BCPZ provides deterministic 10 Mbps connectivity to joint controllers, grippers, and auxiliary sensor clusters over a single lightweight twisted pair. PLCA slot assignment bounds worst-case latency, which is essential for synchronized motion, and the multidrop topology simplifies cable harnesses in moving arms. The SPI host interface lets the motion MCU implement the network stack with minimal overhead. Designers should verify PLCA node counts and cycle times to keep command latency within the motion control budget.
おすすめ
Condition Monitoring and Diagnostics
Condition monitoring endpoints - vibration, current, and temperature sensors on motors and drives - use the ADIN1140BCPZ to stream diagnostics data onto IP networks via multidrop SPE. The deterministic PLCA access prevents collision-induced jitter in vibration waveform sampling, while 10 Mbps bandwidth comfortably carries decimated FFT data from many nodes per segment. The compact 4x4 mm 24-LFCSP fits into tight sensor housings, and the safe-state SAIF mode supports fail-safe reporting when the node detects a fault condition on the monitored asset.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: ADIN1140BCPZ — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | ADIN1140BCPZ-RL | ADIN1110BCPZ |
|---|---|---|---|
| Package | 24-LFCSP (4x4 mm) | 24-LFCSP (4x4 mm) - same | 24-LFCSP (4x4 mm) - same family |
| Brand | Analog Devices | Analog Devices | Analog Devices |
| PHY Standard | 10BASE-T1S | 10BASE-T1S | 10BASE-T1L |
| Topology | Multidrop / point-to-point | Multidrop / point-to-point | Point-to-point |
| Data Rate | 10 Mbps | 10 Mbps | 10 Mbps |
| PLCA Support | Yes (Clause 148) | Yes (Clause 148) | No (not required for T1L) |
主な差別化要因
- Native 10BASE-T1S multidrop with integrated MAC （vs ADIN1110BCPZ)
- Safe-state SAIF configuration （vs ADIN1140BCPZ-RL)
- SPI host interface offloads host software （vs Conventional MII PHYs such as ADIN1100)
設計ノート
Keep the 10BASE-T1S differential pair (T1S_P/T1S_N) routed as a matched 100-ohm differential pair with length matching within 0.5 mm; place the line termination/magnetics network per the ADIN1140 datasheet reference schematic close to the LFCSP pins. Use a solid ground plane under the pair and avoid crossings or via stubs that unbalance the pair. The 24-LFCSP 4x4 mm center paddle should be soldered to the ground plane with a via array for thermal and electrical performance.
PLCA configuration is the most common source of multidrop failures. Each node on the 10BASE-T1S segment must have a unique PLCA node ID, and all nodes must agree on node count; mismatched settings cause silent, collision-free-looking failures with no link. Verify PLCA registers via the SPI interface at commissioning. Also ensure the reset sequencing (RESET_N) is completed before attempting SPI transactions, per the ADIN1140 datasheet startup procedure.
The ADIN1140 is designed for low power operation, making it suitable for battery and densely populated multidrop nodes. Decouple the supply pins with at least 100 nF ceramics placed within 2 mm of the LFCSP pins plus one bulk 10 uF capacitor per supply domain. Confirm the exact supply voltage range and current consumption from the ADIN1140 datasheet Rev. 0 electrical characteristics table before finalizing the power budget.
コンプライアンス情報
[DATA_NEEDED: compliance details not present in verified web data; check ADI product page compliance documents]
