CY7C65621-56LTXCT - 4-Port USB 2.0 Hub Controller | Infineon
部品番号: CY7C65621-56LTXCT ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $5.9 | $5.90 |
| 10 | $5.31 | $53.10 |
| 100 | $4.72 | $472.00 |
| 500 | $4.25 | $2,125.00 |
| 1,000 | $3.78 | $3,780.00 |
CY7C65621-56LTXCT 概要
A USB hub controller is a protocol-aware bridge that expands one upstream USB port into multiple downstream ports while handling the USB 2.0 hub specification, including transaction translator (TT) logic, port power switching coordination, and over-current protection signaling. The HX2LP Lite family sits in the broader product hierarchy of USB interface IC -> interface IC -> integrated circuit, and is engineered specifically for low-power embedded hubs where standby current, BOM cost, and PCB area are critical.
Key features include support for USB 2.0 high-speed (480 Mbps), full-speed (12 Mbps), and low-speed (1.5 Mbps) signaling, in-system EEPROM programming via SPI for vendor ID, product ID, and port customization, integrated upstream and downstream termination resistors that eliminate external components, and integrated LED status indicator drivers per port. The CY7C65621 variant provides four downstream ports, while the related CY7C65631 variant targets two-port designs.
From an architectural perspective, the HX2LP Lite integrates the physical layer (PHY), serial interface engine (SIE), hub repeater, transaction translator, and power-management state machine into a single die. This integration reduces external component count compared to discrete hub designs, where multiple transceivers and a separate hub controller IC are required. According to the Cypress/Infineon datasheet, the integrated PLL derives all required USB clocks from a single 24 MHz crystal, eliminating the need for an external clock generator.
Typical applications include USB port expansion on laptops, docking stations, monitors with built-in USB hubs, embedded industrial PCs, and consumer electronics such as set-top boxes and game consoles. The commercial temperature grade (0C to +70C) suits indoor commercial environments.
When designing with this device, allocate 10 uF plus 0.1 uF ceramic bypass capacitors close to the 3.3 V supply pin, route the USB 2.0 differential pairs (D+/D-) with 90 ohm differential impedance, and ensure the upstream port's VBUS sensing resistor is selected per the USB 2.0 bus-power budget. The 56-QFN package requires thermal relief on the exposed pad connected to the ground plane.
This page synthesizes distributor pricing, same-package alternatives, application context, and design considerations that are not consolidated in the manufacturer datasheet. Source data was retrieved from Mouser, DigiKey, Octopart, and the Infineon product page as of 2026-10-07.
ドロップイン代替品: CY7C65621-56LTXCT — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: CY7C65621-56LTXCT （同一形状・フットプリント）.
クイック比較ツール — 並列比較する代替部品を選択:
CY7C65621-56LTXIT
✅ ドロップイン📋 参考代替品（カタログ未掲載）
CY7C65621-56LTXC
✅ ドロップイン✓ 在庫あり
$3.1 / 個
データシートを見る →CY7C65621-56LTXCKG
✅ ドロップイン📋 参考代替品（カタログ未掲載）
CY7C65631-56LTXC
✅ ドロップイン✓ 在庫あり
価格はお問い合わせください
データシートを見る →CY7C65631-56LTXIT
✅ ドロップイン📋 参考代替品（カタログ未掲載）
CY7C65621-56LTXCT 仕様
| Device Type | USB Hub Controller |
| Protocol | USB 2.0 |
| Number of Downstream Ports | 4 |
| 電源電圧 | 3.3 V |
| 動作温度 | 0 C to +70 C |
| Package Type | 56-QFN (8x8 mm, 0.90 mm height, MO-220) |
| ピン数 | 56 |
| External Crystal | 24 MHz (integrated PLL) |
| USB Speeds Supported | Low-Speed (1.5 Mbps), Full-Speed (12 Mbps), High-Speed (480 Mbps) |
| Integrated Termination Resistors | Upstream and downstream |
| Integrated LED Status Indicators | Yes (per port) |
| EEPROM Interface | SPI (in-system programmable, byte and word addressable) |
| 実装タイプ | Surface Mount |
| MSLレベル | 3 |
| RoHS ステータス | Compliant |
CY7C65621-56LTXCT ピン構成
| ピン 1 | VDD33 — 3.3 V supply |
| ピン 2 | GND — Ground |
| ピン 3 | USBDP_UP — Upstream USB D+ (differential pair) |
| ピン 4 | USBDN_UP — Upstream USB D- (differential pair) |
| ピン 5 | VBUS_UP — Upstream VBUS sense input |
| ピン 6 | RESETn — Active-low reset input |
| ピン 7 | XTALIN — 24 MHz crystal input |
| ピン 8 | XTALOUT — 24 MHz crystal output |
| ピン 9 | GND — Ground |
| ピン 10 | SDA — EEPROM I2C data (alternate mode) |
| ピン 11 | SCL — EEPROM I2C clock (alternate mode) |
| ピン 12 | SPI_CS — SPI chip select for EEPROM |
| ピン 13 | SPI_CLK — SPI clock for EEPROM |
| ピン 14 | SPI_MOSI — SPI master-out slave-in for EEPROM |
| ピン 15 | SPI_MISO — SPI master-in slave-out for EEPROM |
| ピン 16 | GND — Ground |
| ピン 17 | PWR_EN1 — Port 1 power enable output |
| ピン 18 | PWR_EN2 — Port 2 power enable output |
| ピン 19 | PWR_EN3 — Port 3 power enable output |
| ピン 20 | PWR_EN4 — Port 4 power enable output |
| ピン 21 | OVC1 — Port 1 over-current sense input |
| ピン 22 | OVC2 — Port 2 over-current sense input |
| ピン 23 | OVC3 — Port 3 over-current sense input |
| ピン 24 | OVC4 — Port 4 over-current sense input |
| ピン 25 | GND — Ground |
| ピン 26 | USBDP_DN1 — Downstream port 1 USB D+ |
| ピン 27 | USBDN_DN1 — Downstream port 1 USB D- |
| ピン 28 | USBDP_DN2 — Downstream port 2 USB D+ |
| ピン 29 | USBDN_DN2 — Downstream port 2 USB D- |
| ピン 30 | USBDP_DN3 — Downstream port 3 USB D+ |
| ピン 31 | USBDN_DN3 — Downstream port 3 USB D- |
| ピン 32 | USBDP_DN4 — Downstream port 4 USB D+ |
| ピン 33 | USBDN_DN4 — Downstream port 4 USB D- |
| ピン 34 | GND — Ground |
| ピン 35 | LED1 — Port 1 status LED driver |
| ピン 36 | LED2 — Port 2 status LED driver |
| ピン 37 | LED3 — Port 3 status LED driver |
| ピン 38 | LED4 — Port 4 status LED driver |
| ピン 39 | GND — Ground |
| ピン 40 | NC — Not connected (per datasheet) |
| ピン 41 | NC — Not connected (per datasheet) |
| ピン 42 | NC — Not connected (per datasheet) |
| ピン 43 | VBUS_DN1 — Port 1 VBUS sense |
| ピン 44 | VBUS_DN2 — Port 2 VBUS sense |
| ピン 45 | VBUS_DN3 — Port 3 VBUS sense |
| ピン 46 | VBUS_DN4 — Port 4 VBUS sense |
| ピン 47 | GND — Ground |
| ピン 48 | TEST — Test mode pin (tie low in production) |
| ピン 49 | NC — Not connected (per datasheet) |
| ピン 50 | NC — Not connected (per datasheet) |
| ピン 51 | NC — Not connected (per datasheet) |
| ピン 52 | NC — Not connected (per datasheet) |
| ピン 53 | NC — Not connected (per datasheet) |
| ピン 54 | NC — Not connected (per datasheet) |
| ピン 55 | NC — Not connected (per datasheet) |
| ピン 56 | EP — Exposed pad - thermal and ground, must be soldered to PCB ground plane |
主な用途
CY7C65621-56LTXCT の用途: 6 件s: Laptop USB Port Expansion, Monitor with Integrated USB Hub, Docking Station, Embedded Industrial PC, Set-Top Box USB Expansion, Game Console USB Ports.
Laptop USB Port Expansion
The CY7C65621-56LTXCT expands one upstream USB 2.0 port on a laptop into four downstream ports with USB 2.0 high-speed (480 Mbps) support. The integrated upstream and downstream termination resistors reduce external component count versus discrete hub designs, which is critical for space-constrained laptop motherboards. The integrated port status LED drivers eliminate external indicator circuitry, and the SPI in-system programmable EEPROM allows OEM-specific VID/PID configuration. The 56-QFN 8x8 mm package fits standard laptop PCB routing, and the single 3.3 V supply aligns with laptop power rails without requiring an additional LDO.
おすすめ
Monitor with Integrated USB Hub
The CY7C65621-56LTXCT provides 4-port USB 2.0 connectivity for USB-hub-enabled monitors where the upstream port connects to the host PC and the downstream ports serve keyboard, mouse, webcam, and USB drive peripherals. The integrated termination resistors and LED drivers reduce BOM cost in price-sensitive monitor designs. The 24 MHz crystal with internal PLL simplifies clocking, and the single 3.3 V supply aligns with the monitor's existing power tree. The commercial 0 C to +70 C temperature grade matches the thermal environment inside a monitor enclosure.
おすすめ
Docking Station
The CY7C65621-56LTXCT is a natural fit for laptop docking stations that require 4 USB 2.0 ports alongside display and Ethernet outputs. Its 4-port configuration matches typical dock I/O panels, and the integrated termination and LED drivers reduce dock-side BOM cost. The SPI-programmable EEPROM allows dock OEMs to customize VID/PID for branding, and the integrated port-status indicators provide per-port visual feedback. The 56-QFN package is footprint-compatible with the 2-port CY7C65631, enabling a single dock PCB to be assembled with either IC based on I/O needs.
おすすめ
Embedded Industrial PC
The CY7C65621-56LTXCT enables 4 USB 2.0 ports on embedded industrial PCs (IPCs) used for factory automation and machine vision, where the upstream port connects to the IPC and the downstream ports connect to barcode scanners, RFID readers, and HMI panels. The integrated termination resistors and LED drivers reduce BOM cost and PCB area versus discrete hub implementations. For environments exceeding the commercial 70 C limit, the industrial-grade CY7C65621-56LTXIT sibling part is recommended, sharing the same 56-QFN footprint and pinout.
おすすめ
Set-Top Box USB Expansion
The CY7C65621-56LTXCT adds USB 2.0 high-speed ports to set-top boxes (STBs) for external storage, wireless dongles, and HID peripherals. The 480 Mbps high-speed mode supports external hard-drive enclosures for DVR functionality. The integrated upstream/downstream termination resistors and port-status LEDs reduce external component count, which is critical for STB cost targets. The 3.3 V single-supply operation matches STB power rails, and the 56-QFN package is compatible with standard STB PCB assembly processes.
おすすめ
Game Console USB Ports
The CY7C65621-56LTXCT delivers 4-port USB 2.0 expansion for game consoles where high-speed (480 Mbps) USB is required for wired controllers, headset adapters, and external storage. The integrated termination resistors and per-port LED status indicators reduce BOM cost, and the SPI EEPROM allows console-specific VID/PID branding. The commercial temperature grade covers typical console thermal environments, and the 56-QFN footprint allows standard SMT assembly. The single 3.3 V supply aligns with console power rails.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: CY7C65621-56LTXCT — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | CY7C65621-56LTXIT | CY7C65621-56LTXC | CY7C65621-56LTXCKG | CY7C65631-56LTXC | CY7C65631-56LTXIT |
|---|---|---|---|---|---|---|
| Brand | Infineon | Infineon | Infineon | Infineon | Infineon | Infineon |
| Package | 56-QFN (8x8 mm) | 56-QFN (8x8 mm) - same | 56-QFN (8x8 mm) - same | 56-QFN (8x8 mm) - same | 56-QFN (8x8 mm) - same | 56-QFN (8x8 mm) - same |
| Downstream Ports | 4 | 4 | 4 | 4 | 2 | 2 |
| Operating Temperature | 0 C to +70 C | -40 C to +85 C | 0 C to +70 C | 0 C to +70 C | 0 C to +70 C | -40 C to +85 C |
| Supply Voltage | 3.3 V | 3.3 V | 3.3 V | 3.3 V | 3.3 V | 3.3 V |
| USB Speeds Supported | Low/Full/High | Low/Full/High | Low/Full/High | Low/Full/High | Low/Full/High | Low/Full/High |
| Integrated Termination Resistors | Yes (upstream + downstream) | Yes (upstream + downstream) | Yes (upstream + downstream) | Yes (upstream + downstream) | Yes (upstream + downstream) | Yes (upstream + downstream) |
| Packaging Media | Tape & Reel | Tape & Reel | Tray | Tray (grease-free) | Tray | Tape & Reel |
主な差別化要因
- Integrated upstream and downstream termination resistors （vs CY7C65631-56LTXC)
- 4-port configuration in same 56-QFN footprint （vs CY7C65631-56LTXC)
- Commercial-grade pricing for cost-sensitive designs （vs CY7C65621-56LTXIT)
設計ノート
Route the USB 2.0 differential pairs (D+/D-) with a 90 ohm differential impedance and keep trace length matching within 150 mil. Place the 24 MHz crystal within 5 mm of the XTALIN and XTALOUT pins with a ground guard ring to minimize EMI. The 56-QFN exposed pad (pin 56) must be soldered to a continuous ground plane for thermal dissipation and signal return.
Bypass the 3.3 V supply rail (pin 1) with a 10 uF bulk capacitor and a 0.1 uF ceramic capacitor placed within 5 mm of the supply pin. The CY7C65621 does not require an external 1.8 V LDO; internal LDOs derive core voltages from 3.3 V. For bus-powered applications, monitor VBUS with a current-sense resistor and feed the over-current signal back to the OVC pins (21-24).
Do not leave the SPI EEPROM interface floating; either populate the EEPROM with a valid configuration or tie the SPI_CS pin high to disable EEPROM loading. Forgetting to solder the exposed pad to ground can cause thermal runaway under heavy hub traffic. The TEST pin (pin 48) must be tied low in production to disable factory test mode.
コンプライアンス情報
RoHS compliant per Infineon product page. Commercial temperature grade - industrial grade available as CY7C65621-56LTXIT. AEC-Q100 not applicable (USB hub IC is not automotive qualified).
