CY8C4247AZI-L423T - PSoC 4200L 128KB Flash MCU | Infineon
部品番号: CY8C4247AZI-L423T ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $5.12 | $5.12 |
| 10 | $4.55 | $45.50 |
| 100 | $3.78 | $378.00 |
| 500 | $3.05 | $1,525.00 |
| 1,000 | $2.42 | $2,420.00 |
CY8C4247AZI-L423T 概要
A PSoC (Programmable System-on-Chip) is a microcontroller family that combines a CPU core with a fabric of programmable analog and digital Universal Digital Blocks (UDBs) and configurable analog peripherals such as op-amps, ADCs, DACs, and comparators. The PSoC 4200L sits within the broader hierarchy: PSoC 4 -> ARM Cortex-M0 MCU family -> 32-bit microcontroller -> embedded controller -> semiconductor IC. This integration lets designers replace multiple discrete analog ICs with software-reconfigurable on-chip resources.
Key features of the CY8C4247AZI-L423T include a 12-bit SAR ADC with up to 1 Msps sample rate, 4 op-amps, 4 configurable Timer/Counter/PWM blocks, 2 IDAC channels, and a 2.4V to 5.5V operating voltage range. The device also offers capacitive touch sensing (CapSense) capability, USB device support via the integrated USB 2.0 Full-Speed peripheral, and Cryptographic AES hardware block. The wide operating range and rich analog make it suitable for consumer, industrial, and IoT end products.
The device uses a Cortex-M0 core with single-cycle GPIO access, deterministic interrupt handling, and a low-power Sleep mode drawing microamp-level currents. The programmable logic (UDB) layer connects analog and digital resources via the Digital System Interconnect (DSI) matrix, allowing functions like PWM, UART, SPI, or I2S to be implemented in hardware without external peripherals. The 128 KB Flash is organized as 128K x 8 and supports in-application programming via the bootloader.
Typical applications include CapSense touch buttons and sliders for appliances and wearables, USB HID peripherals such as mice and keyboards, sensor hub and signal conditioning nodes, motor control firmware for small DC and stepper motors, and LED lighting controllers requiring analog dimming. The wide 1.71V-5.5V supply range and integrated analog front end simplify BOM in mixed-signal designs.
Design with the CY8C4247AZI-L423T using PSoC Creator IDE or ModusToolbox. Pay attention to decoupling: place 0.1 uF and 1 uF ceramics adjacent to each VDD pin, and follow CapSense layout guidelines (guard ring, ground flood, no traces under sensors) for robust touch performance. The 48-pin TQFP is footprint-compatible with several PSoC 4200L family variants, simplifying upgrades.
This page synthesizes distributor pricing, drop-in pin-compatible alternatives, application-specific design notes, and selection guidance that go beyond the manufacturer datasheet, helping engineers source, compare, and integrate the CY8C4247AZI-L423T quickly.
ドロップイン代替品: CY8C4247AZI-L423T — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: CY8C4247AZI-L423T （同一形状・フットプリント） — 相違点: Core, Package, ADC, Operating Temperature Range, CapSense.
クイック比較ツール — 並列比較する代替部品を選択:
CY8C4247AZI-L423
✅ ドロップイン📋 参考代替品（カタログ未掲載）
CY8C4246AZI-M445
✅ ドロップイン✓ 在庫あり
$2.52 / 個
データシートを見る →CY8C4245AZI-L423
✅ ドロップイン📋 参考代替品（カタログ未掲載）
CY8C4248AZI-L423
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
CY8C4247LQI-BL423
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
CY8C4247AZI-L423T 最大定格＆電気的特性
| Core | ARM Cortex-M0 |
| Bit Width | 32-bit |
| 最大クロック周波数 | 48 MHz |
| Flash Memory | 128 KB (128K x 8) |
| SRAM | 16 KB |
| DMA Channels | 32 |
| Operating Voltage Range | 1.71 V to 5.5 V |
| ADC | 12-bit SAR, up to 1 Msps |
| Operational Amplifiers | 4 on-chip |
| IDAC Channels | 2 |
| TCPWM Blocks | 4 (16-bit) |
| USB | USB 2.0 Full-Speed device |
| パッケージ | 48-TQFP (7x7 mm) |
| 動作温度範囲 | -40C to +85C |
| RoHS ステータス | Compliant |
CY8C4247AZI-L423T ピン構成
| ピン 1 | P0.0 — GPIO / CapSense CSD |
| ピン 2 | P0.1 — GPIO / CapSense CSD |
| ピン 3 | P0.2 — GPIO / CapSense CSD |
| ピン 4 | P0.3 — GPIO / CapSense CSD |
| ピン 5 | P0.4 — GPIO / CapSense CSD |
| ピン 6 | P0.5 — GPIO / CapSense CSD |
| ピン 7 | P0.6 — GPIO / CapSense CSD |
| ピン 8 | P0.7 — GPIO / CapSense CSD |
| ピン 9 | VDD — Digital supply (1.71-5.5V) |
| ピン 10 | VDDA — Analog supply |
| ピン 11 | VSSD — Digital ground |
| ピン 12 | VSSA — Analog ground |
| ピン 13 | P1.0 — GPIO / TCPWM |
| ピン 14 | P1.1 — GPIO / TCPWM |
| ピン 15 | P1.2 — GPIO / TCPWM |
| ピン 16 | P1.3 — GPIO / TCPWM |
| ピン 17 | P1.4 — GPIO / TCPWM |
| ピン 18 | P1.5 — GPIO / TCPWM |
| ピン 19 | P1.6 — GPIO / TCPWM |
| ピン 20 | P1.7 — GPIO / TCPWM |
| ピン 21 | P2.0 — GPIO |
| ピン 22 | P2.1 — GPIO |
| ピン 23 | P2.2 — GPIO |
| ピン 24 | P2.3 — GPIO |
| ピン 25 | P2.4 — GPIO |
| ピン 26 | P2.5 — GPIO |
| ピン 27 | P2.6 — GPIO |
| ピン 28 | P2.7 — GPIO |
| ピン 29 | P3.0 — GPIO / I2C SCL |
| ピン 30 | P3.1 — GPIO / I2C SDA |
| ピン 31 | P3.2 — GPIO / SPI MOSI |
| ピン 32 | P3.3 — GPIO / SPI MISO |
| ピン 33 | P3.4 — GPIO / SPI SCK |
| ピン 34 | P3.5 — GPIO / UART TX |
| ピン 35 | P3.6 — GPIO / UART RX |
| ピン 36 | P3.7 — GPIO |
| ピン 37 | P4.0 — GPIO |
| ピン 38 | P4.1 — GPIO |
| ピン 39 | P5.0 — GPIO / USB D+ |
| ピン 40 | P5.1 — GPIO / USB D- |
| ピン 41 | VUSB — USB supply |
| ピン 42 | VSSD — Digital ground |
| ピン 43 | XRES — External reset (active low) |
| ピン 44 | SWDIO — SWD data |
| ピン 45 | SWDCLK — SWD clock |
| ピン 46 | VDD — Digital supply |
| ピン 47 | VSSD — Digital ground |
| ピン 48 | NC — Not connected (per datasheet) |
主な用途
CY8C4247AZI-L423T の用途: 6 件s: CapSense Touch Button Interface, USB HID Peripheral Controller, Industrial Sensor Hub Node, BLDC / DC Motor Control, LED Lighting Controller, Wearable Health Sensor.
CapSense Touch Button Interface
The CY8C4247AZI-L423T's integrated CapSense peripheral and 4 on-chip op-amps make it ideal for capacitive touch button panels in appliances and consumer electronics. The CapSense Sigma-Delta (CSD) hardware provides 100x better SNR than software-only implementations, enabling reliable touch through 5 mm plastic overlays. With 128 KB Flash the part can store advanced gesture libraries and noise-filtering firmware while the 12-bit SAR ADC enables adjacent analog sensing channels. Typical BOM is reduced by removing external touch ICs and op-amps.
おすすめ
USB HID Peripheral Controller
The CY8C4247AZI-L423T integrates a USB 2.0 Full-Speed device controller plus 48 MHz Cortex-M0 core capable of running USB stacks without external PHY. It is well-suited for USB mice, keyboards, game controllers, and HID-class sensor peripherals. The 32 DMA channels keep USB throughput off the CPU, and the 16 KB SRAM holds HID report buffers plus CapSense firmware. Drop-in compatibility within the PSoC 4200L family simplifies product SKU management.
おすすめ
Industrial Sensor Hub Node
For industrial 4-20 mA loop-powered or 24 V sensor conditioning nodes, the CY8C4247AZI-L423T's 1.71-5.5 V supply range tolerates wide input rails and its 12-bit SAR ADC samples thermocouple, RTD, or strain-gauge signals at up to 1 Msps. The 4 on-chip op-amps implement instrumentation front-ends without external components. Industrial temperature grade (-40C to +85C) supports factory-floor deployment. Integrated CapSense enables front-panel UI without mechanical buttons.
おすすめ
BLDC / DC Motor Control
The CY8C4247AZI-L423T's 4 TCPWM blocks and 32 DMA channels enable sensorless BLDC or brushed DC motor commutation in small appliances, fans, and pumps. The 12-bit ADC samples back-EMF at precise timing intervals, and the programmable UDBs can implement hardware commutation tables. The wide operating voltage and integrated op-amps handle FET gate drive feedback loops. The 48 MHz Cortex-M0 closes FOC loops at sufficient rate for sub-100 W motors.
おすすめ
LED Lighting Controller
Smart LED drivers and architectural lighting controllers benefit from the CY8C4247AZI-L423T's 12-bit IDAC channels for analog dimming and TCPWM blocks for high-resolution PWM dimming. CapSense enables touch dimmers without mechanical sliders. The 128 KB Flash supports DALI, DMX, or BLE Mesh stacks (via external radio). The wide supply and small 48-TQFP package suit retrofit and slim-form-factor luminaires.
おすすめ
Wearable Health Sensor
Wearable heart-rate, SpO2, and motion-tracking devices benefit from the CY8C4247AZI-L423T's low-power Sleep modes, integrated 12-bit ADC for PPG sensor readout, and compact 48-TQFP footprint. The Cortex-M0 + 32 DMA channels keeps CPU wake time minimal while the 128 KB Flash holds algorithm libraries for fitness metrics. The 2.4-5.5 V operating range accommodates single-cell Li-ion directly via internal LDO.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: CY8C4247AZI-L423T — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | CY8C4247AZI-L423 | CY8C4246AZI-M445 | CY8C4245AZI-L423 | CY8C4248AZI-L423 |
|---|---|---|---|---|---|
| Brand | Infineon | Infineon | Infineon | Infineon | Infineon |
| Package | 48-TQFP (7x7 mm) | 48-TQFP (7x7 mm) - same | 48-TQFP (7x7 mm) - same | 48-TQFP (7x7 mm) - same | 48-TQFP (7x7 mm) - same |
| Flash | 128 KB | 128 KB | 64 KB | 64 KB | 256 KB |
| SRAM | 16 KB | 16 KB | 8 KB | 8 KB | 32 KB |
| CPU Core | Cortex-M0 | Cortex-M0 | Cortex-M0 | Cortex-M0 | Cortex-M0 |
| Max Clock | 48 MHz | 48 MHz | 48 MHz | 48 MHz | 48 MHz |
| DMA Channels | 32 | 32 | 16 | 16 | 32 |
| ADC | 12-bit SAR 1 Msps | 12-bit SAR 1 Msps | 12-bit SAR 1 Msps | 12-bit SAR 1 Msps | 12-bit SAR 1 Msps |
| Operating Voltage | 1.71 V to 5.5 V | 1.71 V to 5.5 V | 1.71 V to 5.5 V | 1.71 V to 5.5 V | 1.71 V to 5.5 V |
| Price (qty 1, USD) | 5.12 | 4.95 | 4.20 | 4.10 | 5.85 |
主な差別化要因
- Programmable analog fabric (UABs and op-amps) integrated on-chip （vs CY8C4246AZI-M445)
- Higher DMA channel count than lower-tier siblings （vs CY8C4245AZI-L423)
- Tape-and-reel packaging for SMT production （vs CY8C4247AZI-L423)
設計ノート
Place a 0.1 uF ceramic decoupling capacitor within 3 mm of every VDD pin (pins 9, 46) and a single 1 uF bulk cap adjacent to the VDDA pin (pin 10). Connect VSSD and VSSA to a unified ground plane with short, direct vias. Add a 4.7 uF capacitor on VUSB (pin 41) to meet USB 2.0 Full-Sedge bulk requirements. The 48-TQFP package requires no special thermal management given the part's low power consumption under 100 mW.
When using CapSense, route the sensor traces with a minimum 0.5 mm clearance to adjacent traces, avoid ground plane flooding under the sensor pad, and add a guard ring around the sensor driven by a GPIO shadow. Without these layout practices, touch SNR drops by 3-5x and false triggers occur. The XRES pin (pin 43) must have a 1 kohm pull-up to VDD if external reset is not driven.
For battery-powered designs, enable Deep Sleep mode when CPU is idle to reduce current to under 2 uA typical. The PSoC 4200L family supports multiple low-power modes (Active, Sleep, Deep Sleep, Hibernate) controlled by the Power Management API in PSoC Creator. Wake sources include GPIO interrupts, WDT, and RTC alarms. Estimated: at 3.0 V VDD and CapSense scanning every 100 ms, average current consumption is approximately 15-25 uA.
The SWD interface (SWDIO/SWDCLK on pins 44/45) needs 50 kohm pull-ups on each line for reliable programming with PSoC Creator or ModusToolbox. Keep SWD trace length under 100 mm and away from switching signals. For production programming, route SWD to a 2x5 1.27 mm header or test pad pattern. The USB D+/D- traces (pins 39/40) must be 90-ohm differential, length-matched within 2 mm.
コンプライアンス情報
RoHS and REACH compliant per Infineon product page. Not AEC-Q100 qualified - select automotive-grade PSoC variants for vehicle applications. Halogen-free per JEDEC JS709.
