DRTR5V0U2SR-7 - 2-Channel 5V TVS Array | Diodes Incorporated
部品番号: DRTR5V0U2SR-7 ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $0.39 | $0.39 |
| 10 | $0.34 | $3.40 |
| 100 | $0.27 | $27.00 |
| 500 | $0.22 | $110.00 |
| 1,000 | $0.18 | $180.00 |
DRTR5V0U2SR-7 概要
A TVS diode array is a discrete protection component that diverts transient voltage away from a protected circuit while presenting a high-impedance path during normal operation. The DRTR5V0U2SR-7 belongs to the broader ESD-protection and circuit-protection hierarchy, alongside surge suppressors, clamping diodes, and interface-protection devices. Two protected channels in one compact package simplify board layout compared with separate single-line protection devices, provided that the channel assignments and footprint are checked against the selected interface.
The verified distributor descriptions identify this part as a two-channel low-capacitance TVS array with 1.0 pF capacitance, 5 A peak pulse current, and 400 mW power. The manufacturer datasheet search result lists high-speed applications including USB 2.0, IEEE 1394, Serial ATA, DVI, HDMI, and PCI. The exact clamping voltage, leakage current, working voltage, response time, and detailed pin mapping are not present in the supplied source snippets and therefore are not inferred here.
The SOT-143 package is intended for compact PCB placement and surface-mount assembly. Because a protection device is normally placed close to the connector or protected interface, trace length and return-path continuity are important. The PCB land pattern should follow the manufacturer footprint, and the protection device should not be placed where long unprotected traces can carry an ESD transient back toward the protected circuitry. Validate the final design against the applicable interface standard and the device’s complete electrical ratings.
Typical uses include USB, high-speed serial links, Ethernet-PHY protection, HDMI, PCI, DVI, and other exposed connector lines. For those applications, the 1.0 pF figure is the principal verified low-capacitance feature, while the 5 A and 400 mW figures describe the supplied transient and power ratings. Do not use those figures as a substitute for the complete datasheet rating table when sizing surge exposure or selecting a replacement.
This page consolidates the verified distributor information, official manufacturer link, datasheet link, packaging data, and application guidance. It also separates confirmed values from unavailable electrical details so engineers can make an informed sourcing and design decision without relying on unverified specifications.
ドロップイン代替品: DRTR5V0U2SR-7 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
クイック比較ツール — 並列比較する代替部品を選択:
DT1452-02SO-7
✅ ドロップイン📋 参考代替品（カタログ未掲載）
DRTR5V0U2SR-7 最大定格＆電気的特性
| Product Type | 2-channel low-capacitance TVS diode array |
| Protection Direction | Unidirectional |
| Rated Clamp Voltage | 5.5 V |
| Number of Channels | 2 |
| Peak Pulse Current | 5 A |
| Power Rating | 400 mW |
| Capacitance | 1.0 pF |
| パッケージ | SOT-143, 4-pin surface mount |
| 実装タイプ | Surface mount |
| Manufacturer | Diodes Incorporated |
| Target MPN | DRTR5V0U2SR-7 |
| Series | DRTR5V0U2SR |
| ESD Protection Application | Data-line protection |
| High-Speed Interfaces | USB 2.0, IEEE 1394, Serial ATA, DVI, HDMI, PCI |
DRTR5V0U2SR-7 sot-143, 4-pin surface mount ピン配置ガイド
DRTR5V0U2SR-7 (sot-143, 4-pin surface mount パッケージ) のピン配置。 このパワーデバイスは、ゲート、ドレイン、ソース端子を備えています。非極性パッケージの場合、正確なピン1の向きとフットプリントの詳細については、メーカーのデータシートを参照してください。主な用途には、電源設計、モータ駆動、負荷スイッチングがあります。
詳細なピン配置データはありません: DRTR5V0U2SR-7.
詳細は データシート をご参照ください。
主な用途
DRTR5V0U2SR-7 の用途: 6 件s: USB 2.0 Data-Line Protection, HDMI Connector ESD Protection, Serial ATA Data Protection, Ethernet-PHY Protection, PCI Interface Protection, DVI High-Speed Line Protection.
USB 2.0 Data-Line Protection
The DRTR5V0U2SR-7 fits USB data-line ESD protection because the verified manufacturer datasheet search result lists USB 2.0 as a typical application and identifies a 1.0 pF capacitance. The two-channel array can protect a paired signal path when its pin mapping is taken directly from the official datasheet. Place it close to the connector so the ESD transient is clamped before it reaches the controller or PHY. The low capacitance helps preserve signal integrity, but the design must still verify rise-time margin, leakage, clamp voltage, and the applicable USB channel voltage.
おすすめ
HDMI Connector ESD Protection
The DRTR5V0U2SR-7 is suitable for exposed HDMI-related signal pairs when the selected line arrangement matches the datasheet pinout. The manufacturer application list includes HDMI, and the verified 1.0 pF capacitance is valuable for minimizing loading on high-speed lines. The array should be mounted adjacent to the connector with a short return path and without long unprotected traces. Designers should separately verify differential impedance continuity, AC coupling, line-rate behavior, and the exact clamp and leakage ratings in the manufacturer documentation.
おすすめ
Serial ATA Data Protection
The manufacturer datasheet search result identifies Serial ATA as a typical high-speed-port application for DRTR5V0U2SR. The verified 1.0 pF capacitance can help limit the protection network’s loading, while the two-channel arrangement can serve compatible paired lines when the datasheet pin mapping supports that configuration. Place the device at the connector entry point and maintain a continuous ground reference. Before release, confirm the device’s complete voltage ratings and test it with the actual connector, cable, board geometry, and system-level ESD requirement.
おすすめ
Ethernet-PHY Protection
DRTR5V0U2SR-7 can be considered for Ethernet-PHY protection because the manufacturer search result identifies Ethernet-PHY protection as an application for the device family and the verified distributor description confirms a low-capacitance two-channel array. Its 1.0 pF rating is relevant to signal integrity, but the actual channel arrangement must be confirmed before placement. Use the shortest practical connection from the external line to the protection array and validate insertion loss, common-mode behavior, leakage, and ESD immunity in the completed design.
おすすめ
PCI Interface Protection
The manufacturer datasheet search result lists PCI among the high-speed-port applications for DRTR5V0U2SR, making the array relevant for PCI-facing protection when its electrical ratings match the line being protected. The verified 1.0 pF capacitance helps avoid excessive loading, and the four-pin SOT-143 footprint supports compact placement. Place the suppressor near the card-edge or connector entry and preserve impedance-controlled routing. Confirm the complete pinout, working voltage, leakage, and clamp data because those details are not present in the supplied search snippets.
おすすめ
DVI High-Speed Line Protection
DRTR5V0U2SR-7 is applicable to DVI-related high-speed lines when the two channels align with the protected nets and the complete manufacturer ratings are acceptable. DVI is explicitly included in the manufacturer’s high-speed-port list, while the verified 1.0 pF capacitance supports low-impact protection. The protection device should be close to the connector and connected to a short ground return to divert transient current. Validate differential impedance, AC-coupling capacitors, connector-level ESD, and system-level immunity rather than relying on capacitance alone.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: DRTR5V0U2SR-7 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | DT1452-02SO-7 |
|---|---|---|
| Brand | Diodes Incorporated | Diodes Incorporated |
| Package | SOT-143, 4-pin surface mount | SOT-143 according to candidate designation; confirm package drawing |
主な差別化要因
- Two-channel protection in one four-pin package （vs DT1452-02SO-7)
- Low capacitance for high-speed interfaces （vs DT1452-02SO-7)
- Verified transient and power ratings （vs DT1452-02SO-7)
設計ノート
Place the DRTR5V0U2SR-7 close to the connector or ESD entry point so the transient is diverted before it reaches the protected interface. Keep the protected trace short, use a low-inductance ground return, and follow the official SOT-143 land pattern. The verified snippets do not provide the pin map, so channel assignment must be confirmed from the manufacturer PDF before fabrication.
Use the verified 1.0 pF capacitance as an initial low-capacitance screening value, then confirm the test frequency and conditions in the complete datasheet. For USB, HDMI, PCI, DVI, Serial ATA, or other high-speed lines, check capacitance-induced rise-time degradation, impedance continuity, leakage, and channel-to-channel balance. A low-capacitance part does not by itself guarantee signal-integrity compliance.
Do not substitute a TVS array solely because it has the same nominal package. Verify the four-pin footprint, pin numbering, protected-channel assignment, clamp voltage, peak pulse current, power rating, leakage, and working voltage. The supplied cross-reference results do not establish DT1452-02SO-7 as a fully verified drop-in replacement, so it requires datasheet review before use.
コンプライアンス情報
The verified manufacturer and distributor pages identify the device and its protection applications, but the supplied data does not explicitly state RoHS, REACH, AEC-Q100, lead-free, halogen-free, or conflict-minerals status. AEC-Q100 is not applicable because this is a discrete protection diode rather than an automotive-qualified integrated circuit.
