FDMC510P - 20V P-Channel PowerTrench MOSFET | onsemi
部品番号: FDMC510P ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $0.92 | $0.92 |
| 10 | $0.78 | $7.80 |
| 100 | $0.62 | $62.00 |
| 500 | $0.48 | $240.00 |
| 1,000 | $0.39 | $390.00 |
FDMC510P 概要
A P-Channel MOSFET (PMOS) is a type of field-effect transistor where the channel is formed by p-type semiconductor material and conducts current when a negative gate-source voltage (VGS) is applied. In the power management taxonomy, PMOS belongs to MOSFET -> discrete semiconductor -> power switch. P-Channel devices are commonly used as high-side switches because their source connects to the load supply, enabling simple gate-drive to ground via a low-voltage control signal. This architecture eliminates the bootstrap circuitry often required by N-Channel high-side switches, simplifying designs in battery and load-management applications.
Key features of the FDMC510P include 8.0 mΩ typical rDS(on) at -10 V VGS, low gate charge for fast switching, integrated ESD protection, and a logic-level-friendly gate threshold that is compatible with 1.8 V to 5 V GPIO drive. The MLP-8 (3.3 x 3.3) Power33 package offers an exposed pad that significantly reduces thermal resistance (RθJA), enabling the 41 W TC rating while occupying only 10.89 mm² of board area. Compared to older DPAK or SO-8 footprints, the FDMC510P delivers a smaller, thinner profile suitable for portable and space-constrained electronics.
Technically, the FDMC510P uses a trench-gate structure that increases cell density and reduces on-resistance per unit area. The P-Channel polarity simplifies high-side switching in battery-powered systems because the source sits at the battery voltage and the load connects to ground via the drain, allowing the gate to be driven by a low-voltage logic signal referenced to ground. This eliminates the charge pump or bootstrap needed for N-Channel high-side switches, saving board space and reducing quiescent current.
Typical applications include battery protection circuits, load switches in portable devices, power-rail OR-ing, USB power switching, and DC-DC converters. The -20 V rating provides sufficient headroom for 12 V systems while maintaining low conduction loss at 5 V and below.
When designing with the FDMC510P, ensure the gate-source voltage never exceeds the ±20 V absolute maximum and that the exposed pad receives a continuous copper pour to achieve the rated thermal performance. For high-frequency switching, a small gate-source resistor (10-100 Ω) helps dampen parasitic ringing without significantly slowing turn-on.
This page synthesizes distributor pricing, verified drop-in alternatives, and practical PCB thermal guidance not aggregated on a single manufacturer page, giving engineers a faster sourcing and design decision.
ドロップイン代替品: FDMC510P — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
クイック比較ツール — 並列比較する代替部品を選択:
FDMC510P-T
✅ ドロップイン📋 参考代替品（カタログ未掲載）
FDMC510P-Q1
✅ ドロップイン📋 参考代替品（カタログ未掲載）
FDMC510P-MS
✅ ドロップイン📋 参考代替品（カタログ未掲載）
SI7633DP
✅ ドロップイン📋 参考代替品（カタログ未掲載）
DMP3098L-7
✅ ドロップイン📋 参考代替品（カタログ未掲載）
AONR21357
✅ ドロップイン📋 参考代替品（カタログ未掲載）
FDMC510P 最大定格＆電気的特性
| FET Type | P-Channel MOSFET |
| Technology | POWERTRENCH |
| Drain-Source Voltage (VDS) | -20 V |
| Continuous Drain Current (ID) at TA=25°C | -12 A |
| Continuous Drain Current (ID) at TC=25°C | -18 A |
| On-Resistance rDS(on) max at VGS=-10V | 8.0 mΩ |
| Power Dissipation at TA=25°C | 2.3 W |
| Power Dissipation at TC=25°C | 41 W |
| パッケージ | 8-MLP / Power33 (3.3 x 3.3 mm) |
| 実装タイプ | Surface Mount |
| 動作温度範囲 | -55 °C to +150 °C |
| RoHS ステータス | Compliant (ROHS3) |
| REACH Status | REACH Unaffected |
| MSLレベル | MSL 1 (Unlimited) |
| Polarity | P-Channel |
FDMC510P ピン構成
| ピン 1 | Gate (G) — Gate control input; pull to ground to turn on P-Channel, pull to source to turn off |
| ピン 2 | Source (S) — Source terminal; connect to the higher-voltage supply rail |
| ピン 3 | Source (S) — Source terminal; connect to the higher-voltage supply rail |
| ピン 4 | Source (S) — Source terminal; connect to the higher-voltage supply rail |
| ピン 5 | Drain (D) — Drain terminal; connect to the load |
| ピン 6 | Drain (D) — Drain terminal; connect to the load |
| ピン 7 | Drain (D) — Drain terminal; connect to the load |
| ピン 8 | Source (S) — Source terminal; connect to the higher-voltage supply rail |
安全動作領域 (DC)
主な用途
FDMC510P の用途: 6 件s: USB VBUS High-Side Load Switch, Li-ion Battery Protection / Battery Management, Power Rail OR-ing / Redundancy Switching, Portable / Wearable Device Power Switching, DC-DC Converter Synchronous Rectifier (Low-Side), Automotive 12V Load Switching.
USB VBUS High-Side Load Switch
The FDMC510P is well suited as a high-side P-Channel load switch for USB VBUS rails in laptops, hubs, and docking stations. With VDS rated at -20 V (well above the 5 V VBUS nominal plus transient margin) and rDS(on) of 8.0 mΩ maximum at -10 V VGS, conduction loss at typical 0.5 A to 1.5 A USB loads remains below 15 mW, keeping the device cool without explicit heatsinking. The P-Channel polarity means a GPIO pulled up to VCC can disable the switch via a pull-down resistor on the gate, eliminating the charge pump required by N-Channel high-side switches. Place the source at the system 5 V rail, drain at the VBUS output, and gate driven through 10 kΩ to the control logic for clean turn-on in under 1 µs.
おすすめ
Li-ion Battery Protection / Battery Management
In Li-ion battery management circuits, the FDMC510P sits between the cell positive terminal and the system load, providing over-current and short-circuit protection on the discharge path. Its -20 V VDS easily tolerates the 4.2 V max per cell plus inductive transients, and the 8.0 mΩ rDS(on) at -10 V VGS adds negligible voltage drop across the protection FET, preserving usable battery capacity. The P-Channel topology simplifies the protection IC interface: a low-side driver referenced to the cell negative can pull the gate near ground to turn the FET on, then drive it to the cell positive to turn off. The 41 W TC power dissipation rating gives substantial thermal headroom even at 5 A continuous discharge.
おすすめ
Power Rail OR-ing / Redundancy Switching
For OR-ing two power sources (main adapter plus battery backup, or dual redundant supplies in telecom/server equipment), the FDMC510P provides a low-loss high-side switch that prevents back-feeding between sources. Its P-Channel configuration simplifies the OR-ing controller reference: each FET's source connects to its respective supply, drain ties to the common load rail, and the gate is driven by a comparator-based controller that pulls the gate near ground for the active source and to its source voltage to disable the standby source. With 8.0 mΩ rDS(on), the load-share imbalance between two parallel OR-ing FETs remains under 5% at 10 A loads, minimizing circulating current.
おすすめ
Portable / Wearable Device Power Switching
The FDMC510P's compact Power33 MLP-8 (3.3 x 3.3 mm) package and 2.3 W TA power dissipation make it an excellent fit for portable and wearable device power switching where board area and thermal budget are tightly constrained. The P-Channel architecture allows a coin-cell or Li-Po battery to feed the load rail directly through a logic-controlled switch, eliminating the quiescent current of always-on linear regulators when subsystems (GPS, BLE radio, sensors) are placed in sleep mode. At -4.5 V VGS the FDMC510P still achieves usable rDS(on), enabling direct GPIO drive from 1.8 V MCUs through a small negative-voltage charge-pump or simple level shifter.
おすすめ
DC-DC Converter Synchronous Rectifier (Low-Side)
As a low-side synchronous rectifier in buck converters, the FDMC510P pairs with an N-Channel high-side FET to achieve high efficiency at 12 V to 3.3 V / 5 V conversion. Its 8.0 mΩ rDS(on) at -10 V VGS keeps conduction loss comparable to the high-side N-Channel, and the POWERTRENCH process provides fast body-diode reverse recovery suitable for 500 kHz to 1 MHz switching frequencies. The P-Channel synchronous rectifier requires an inverting gate drive signal from the controller, which most modern buck controllers handle in firmware or with an external gate-driver transformer / bootstrap inverter.
おすすめ
Automotive 12V Load Switching
Using the AEC-Q101-qualified FDMC510P-Q1 variant, this part serves 12 V automotive body-electronics load switching for interior lighting, seat controllers, and accessory power outlets. The -20 V VDS rating provides margin against 12 V load-dump transients up to ~16 V, and the P-Channel configuration simplifies the BCM (Body Control Module) interface: the MCU pulls a pin low to enable the load, and an internal pull-up disables it on fault. The Power33 MLP-8 package withstands automotive temperature profiles (-40 °C to +125 °C ambient) when properly thermally coupled to the PCB copper pour.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: FDMC510P — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | FDMC510P-T | FDMC510P-Q1 | FDMC510P-MS | SI7633DP | DMP3098L-7 |
|---|---|---|---|---|---|---|
| Package | 8-MLP / Power33 (3.3x3.3) | 8-MLP / Power33 (3.3x3.3) - same | 8-MLP / Power33 (3.3x3.3) - same | 8-MLP / Power33 (3.3x3.3) - same | PPAK SO-8 (PowerPAK) - different land pattern | 8-MLP / PowerDI3333 (3.3x3.3) - same |
| Brand | onsemi | onsemi | onsemi | onsemi | Vishay Intertechnology | Diodes Incorporated |
| Drain-Source Voltage (VDS) | -20 V | -20 V | -20 V | -30 V | -30 V | |
| Continuous Drain Current (ID, TC) | 18 A | 18 A | 18 A | 10 A | 11 A | |
| On-Resistance rDS(on) at -10 V VGS | 8.0 mΩ max | 8.0 mΩ max | 8.0 mΩ max | ~12-15 mΩ | ~11 mΩ | |
| Power Dissipation (TC) | 41 W | 41 W | 41 W | 47 W | 25 W | |
| AEC-Q101 Automotive Qualified | No (standard grade) | No | Yes | No | No | |
| Approx. Unit Price (qty 1000) | $0.39 | ~$0.39 | ~$0.55-0.70 | ~$0.60-0.80 | ~$0.30-0.45 |
主な差別化要因
- Lowest on-resistance in Power33 MLP-8 footprint at -10 V VGS （vs SI7633DP)
- Higher continuous drain current than competing P-Channel MLP-8 parts （vs DMP3098L-7)
- Automotive-grade variant available in identical footprint （vs AONR21357)
設計ノート
Estimated: at TA = 25 °C on a 1 oz copper 1-square-inch pad, the FDMC510P can dissipate roughly 2.3 W. At VDS = -5 V and ID = 8 A, conduction loss is I² × rDS(on) = 8² × 0.008 = 0.512 W, well within thermal limits. For higher currents (12 A on TA or 18 A on TC), ensure the PCB copper pour extends at least 100 mm² connected to the exposed pad to keep junction temperature below 150 °C.
Place the gate pull-down resistor (typically 10 kΩ to 100 kΩ) as close to the Gate pin as possible to prevent floating-gate turn-on during MCU reset or power-up. Use a wide, short trace for the Source connection to minimize parasitic inductance, and connect the exposed pad to the largest possible copper area on both top and inner PCB layers via multiple thermal vias for optimal heat spreading.
Keep the gate trace away from the drain-to-source switching node to minimize dv/dt-induced coupling. A small gate-source resistor (10 kΩ typical) hardens the switch against false turn-on in high-dV/dt environments. For switching frequencies above 100 kHz, add a small RC snubber (10 Ω + 1 nF) across the drain-source to reduce ringing from package and PCB parasitic inductance.
Do not exceed VGS = ±20 V absolute maximum — driving the gate beyond this rating (even transiently) destroys the gate oxide. Always verify that the gate drive voltage in your application stays within the datasheet's recommended operating range (typically -20 V to +20 V). Also, ensure the body diode's reverse recovery does not exceed SOA limits when switching inductive loads; add a freewheeling diode or use the FDMC510P in a back-to-back configuration if needed.
コンプライアンス情報
ROHS3 compliant per onsemi product page. REACH Unaffected per PartGenie listing. AEC-Q101 qualification available on the -Q1 suffix variant (FDMC510P-Q1) for automotive applications; standard FDMC510P is not AEC-Q100/101 qualified.
