HI1-574AKD-5 - 12-Bit SAR ADC 50kSPS 28-SBDIP | Renesas
部品番号: HI1-574AKD-5 ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $78.5 | $78.50 |
| 10 | $71.2 | $712.00 |
| 100 | $62.4 | $6,240.00 |
| 500 | $54.1 | $27,050.00 |
| 1,000 | $47.8 | $47,800.00 |
HI1-574AKD-5 概要
A SAR ADC is a type of data converter that uses a binary-weighted capacitor array and a successive-approximation register to digitize an analog input one code at a time per clock cycle. Within the broader data acquisition hierarchy, a SAR ADC sits between flash converters (fastest, lowest resolution) and sigma-delta ADCs (highest resolution, slower). The HI-574A family belongs to the precision industrial ADC category, often used in legacy microprocessor-controlled measurement equipment.
Key features include bipolar analog processing with the Renesas dielectric-isolation process for enhanced AC performance, ±1 LSB maximum linearity, and an internal buried-zener reference trimmed to +10.00 V. The three-state output buffers allow direct connection to 8-bit or 16-bit data buses without external logic, and a single +5 V supply plus ±12 V to ±15 V analog rails power the converter. The package is specified across the 0 °C to +75 °C commercial temperature range.
Architecturally, the converter combines two monolithic dice inside one hermetic package: a bipolar analog front-end die using dielectric isolation, and a CMOS digital control die. This hybrid construction is a hallmark of mid-1980s precision converters and explains the device's strong DC accuracy plus reasonable AC performance. Designers must sequence ±15 V before +5 V at startup to avoid latch-up.
Typical applications include industrial process control instrumentation, multi-channel data acquisition front-ends, panel meters, and legacy replacement of AD574A/AD574AKD pinouts. Designers choose this part when they need a true drop-in for an existing AD574A footprint with extended temperature screening and internal reference.
A primary design consideration is supply sequencing: bring up the ±12 V to ±15 V analog supplies before the +5 V logic supply to prevent latch-up damage. The internal reference has a finite drive capability, so buffered external use requires an op-amp follower.
This page synthesizes distributor pricing, drop-in AD574A-family alternatives, and design notes not consolidated on the manufacturer datasheet.
ドロップイン代替品: HI1-574AKD-5 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
クイック比較ツール — 並列比較する代替部品を選択:
AD574AKD
✅ ドロップイン📋 参考代替品（カタログ未掲載）
AD574AKD/+
✅ ドロップイン📋 参考代替品（カタログ未掲載）
AD574ALD
✅ ドロップイン📋 参考代替品（カタログ未掲載）
AD574ALD/+
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MX574AKD
✅ ドロップイン📋 参考代替品（カタログ未掲載）
HS574AK
✅ ドロップイン📋 参考代替品（カタログ未掲載）
HI1-574AKD-5 最大定格＆電気的特性
| 分解能 | 12 bits |
| Architecture | Successive Approximation (SAR) |
| Number of Channels | 1 |
| Conversion Rate | 50 kSPS (max) |
| Number of Inputs | 2 (unipolar / bipolar) |
| 入力電圧範囲 | 0 V to +10 V or -5 V to +5 V |
| Data Interface | Parallel (8/12-bit, microprocessor-compatible) |
| 出力タイプ | Three-state, three-state TTL |
| Internal Reference | +10 V (nominal) |
| Supply Voltage - Analog | +/-12 V to +/-15 V |
| Supply Voltage - Digital | +5 V |
| 動作温度 | 0 C to +75 C (commercial) |
| パッケージ | 28-SBDIP (Ceramic Side-Brazed DIP) |
| 実装タイプ | Through-Hole |
| Number of Dice | 2 (bipolar analog + CMOS digital) |
| Input Type | Bipolar, single-ended |
HI1-574AKD-5 ピン構成
| ピン 1 | VCC — +12 V to +15 V analog positive supply |
| ピン 2 | VEE — -12 V to -15 V analog negative supply |
| ピン 3 | REF OUT — +10 V internal reference output |
| ピン 4 | ANALOG COMMON — Analog ground (REF LO + input ground) |
| ピン 5 | REF IN — Reference input (internal/external select) |
| ピン 6 | BIPOFF — Bipolar offset adjustment |
| ピン 7 | 10V IN — 0-10 V unipolar analog input |
| ピン 8 | 20V IN — 0-20 V unipolar analog input |
| ピン 9 | AIN — Analog input |
| ピン 10 | AGND — Analog ground |
| ピン 11 | Vlogic — +5 V logic supply |
| ピン 12 | DGND — Digital ground |
| ピン 13 | DB0 — Data bit 0 (LSB, three-state) |
| ピン 14 | DB1 — Data bit 1 (three-state) |
| ピン 15 | DB2 — Data bit 2 (three-state) |
| ピン 16 | DB3 — Data bit 3 (three-state) |
| ピン 17 | DB4 — Data bit 4 (three-state) |
| ピン 18 | DB5 — Data bit 5 (three-state) |
| ピン 19 | DB6 — Data bit 6 (three-state) |
| ピン 20 | DB7 — Data bit 7 (three-state) |
| ピン 21 | DB8 — Data bit 8 (three-state) |
| ピン 22 | DB9 — Data bit 9 (three-state) |
| ピン 23 | DB10 — Data bit 10 (three-state) |
| ピン 24 | DB11 — Data bit 11 (MSB, three-state) |
| ピン 25 | STS — Status (active high during conversion) |
| ピン 26 | CE — Chip enable (active low) |
| ピン 27 | R/C — Read/Convert control |
| ピン 28 | CS — Chip select (active low) |
主な用途
HI1-574AKD-5 の用途: 7 件s: Industrial Process Control Instrumentation, Legacy AD574A Replacement / Field Retrofits, Multichannel Data Acquisition Front-Ends, Panel Meters and Digital Indicators, Medical Patient Monitoring Signal Acquisition, Avionics and Military Instrumentation Retrofits, Test & Measurement Bench Equipment.
Industrial Process Control Instrumentation
The HI1-574AKD-5 provides 12-bit resolution and ±1 LSB linearity required for accurate 4-20 mA loop-derived signal acquisition in DCS and PLC analog input modules. With its internal +10 V reference and 0-10 V/-5 to +5 V input ranges, the part interfaces directly to shunt-resistor-derived voltage signals. The 50 kSPS throughput covers multiplexed multi-channel scan rates typical of process controllers. Supply-rail tolerance matches ±12 V to ±15 V industrial analog busses, simplifying power-tree design.
おすすめ
Legacy AD574A Replacement / Field Retrofits
The HI1-574AKD-5 is a true drop-in pin-for-pin replacement for the legacy Analog Devices AD574AKD that is widely installed in military, aerospace, and industrial test equipment from the 1980s and 1990s. Same 28-CDIP ceramic package, same internal +10 V reference and same +5 V / ±12 V supply pins means retrofits require no PCB rework. Designers use the Renesas part to extend the supportable lifetime of obsolete AD574A-based systems without redesign.
おすすめ
Multichannel Data Acquisition Front-Ends
In scanned 8/16/32-channel data acquisition systems, the HI1-574AKD-5's 50 kSPS throughput provides enough settling margin for a multiplexing front-end plus a 1 µs sample-and-hold. Three-state parallel outputs drive an 8-bit bus directly without additional buffers, simplifying wiring to legacy 8085/8051/Z80 microprocessors. ±12 V to ±15 V analog rails match common industrial-front-end power trees, reducing conditioning circuitry.
おすすめ
Panel Meters and Digital Indicators
The HI1-574AKD-5's internal reference and bipolar input range make it well-suited for panel-meter designs reading ±5 V or ±10 V transducer signals directly. ±1 LSB linearity gives a 3.5-digit dPM-class instrument accuracy, and the on-chip clock removes the need for an external timing source. Housed in a hermetic 28-CDIP package, the converter survives harsh factory-floor thermal environments better than plastic-DIP ADCs.
おすすめ
Medical Patient Monitoring Signal Acquisition
The HI1-574AKD-5's ±1 LSB linearity and 12-bit resolution capture biosignal waveforms in bedside monitors, ECG front-ends, and blood-pressure measurement modules. Its 50 kSPS throughput covers heart-rate and respiration waveforms while the internal reference simplifies medical-grade calibration. Designers pair the converter with low-noise instrumentation amplifiers and use its three-state output bus to feed ARM or legacy microprocessors.
おすすめ
Avionics and Military Instrumentation Retrofits
The HI1-574AKD-5's ceramic SBDIP package withstanding thermal cycling and mechanical shock fits cockpit instrumentation and military test-gear retrofit programs. The part is qualified per Renesas / Intersil manufacturing flows for aerospace/high-reliability refurbishment. Pin-compatible with the AD574A makes the converter a low-risk substitute when systems need urgent lifetime support without redesign.
おすすめ
Test & Measurement Bench Equipment
The HI1-574AKD-5's 12-bit resolution and 50 kSPS throughput place it as a workhorse ADC in bench multimeters, scanners, and arbitrary waveform analyzer front-ends. Designers exploit the internal +10 V reference for traceable bench calibrations, and the bipolar input range handles direct capture of -5 V to +5 V signals used in automated test lines. The three-state parallel bus interfaces directly to legacy GPIB-instrument microprocessors.
おすすめ
エンジニアリング参考データ: HI1-574AKD-5 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | AD574AKD | MX574AKD | HS574AK |
|---|---|---|---|---|
| Brand | Renesas Electronics | Analog Devices | Maxim Integrated | Harris Semiconductor (ADI heritage) |
| Package | 28-SBDIP (Ceramic Side-Brazed DIP) | 28-CDIP - same | 28-CDIP - same | 28-CDIP - same |
| Resolution | 12 bits | 12 bits | 12 bits | 12 bits |
| Throughput | 50 kSPS | 40 kSPS (typical AD574A) | 40 kSPS | 40 kSPS |
| Internal Reference | +10 V | +10 V | +10 V | +10 V |
| Input Ranges | 0-10V, -5V to +5V | 0-10V, -5V to +5V, 0-20V | 0-10V, -5V to +5V, 0-20V | 0-10V, -5V to +5V, 0-20V |
| Analog Supply | ±12V to ±15V | ±12V to ±15V | ±12V to ±15V (lower current) | ±12V to ±15V |
| Operating Temperature | 0 C to +75 C (commercial) | 0 C to +70 C | 0 C to +70 C | 0 C to +70 C |
主な差別化要因
- Dielectric-isolation bipolar analog die for enhanced AC performance （vs AD574AKD)
- Single +10 V reference trim for the entire family （vs MAX574AKD)
- Long-term active product support for AD574A retrofits （vs HS574AK (Harris Semiconductor))
設計ノート
Estimated: Power up the ±12 V to ±15 V analog supplies (VCC / VEE) BEFORE the +5 V logic supply (Vlogic). Powering Vlogic first on the HI1-574AKD-5 without VCC/VEE present may forward-bias internal ESD diodes and trigger latch-up damage due to the bipolar analog die construction. Per the Renesas HI-574A datasheet, a recommended power-rail sequence is +5 V applied after ±12 V or ±15 V have reached at least 90% of their nominal value, with a typical delay of 50-100 ms being safe at startup.
The internal +10 V reference (pin 3, REF OUT) has a finite drive capability of about 2-3 mA per the HI-574A datasheet; it cannot drive a low-impedance load directly. If using the internal reference to bias external conditioning circuitry, buffer it with an operational amplifier follower. Also keep REF IN (pin 5) and BIPOFF (pin 6) decoupling tight: 0.1 µF ceramic as close as possible to the pins for noise immunity and to limit reference-load transients during conversion.
Estimated: Run separate analog and digital grounds (AGND/ANALOG COMMON on pin 4 vs DGND on pin 12), tying them only at the converter's pin 10/4 star ground. Place 0.1 µF X7R bypass caps within 3 mm of each power pin (VCC, VEE, Vlogic). The 28-SBDIP pin pitch (2.54 mm) allows standard through-hole layout but designers often use dual-trace routing on top/bottom layers to keep analog inputs clear of digital bus and clock traces.
Keep analog input traces (pins 7, 8, 9) short and guarded by ANALOG COMMON (pin 4) on both sides of the input trace. The 50 kSPS conversion window is short, so the analog front-end RC settling time can dominate noise: a 100 Ω input resistor in series plus a 1 nF to 10 nF capacitor at the input gives adequate bandwidth (~1.5 MHz) while limiting transient current during sampling. Route the STS (status, pin 25), CE (chip enable, pin 26), R/C (pin 27), and CS (pin 28) digital control lines away from analog inputs.
コンプライアンス情報
Ceramic MIL-HDBK-grade parts (28-SBDIP) typically predate broad RoHS compliance; specific Renesas / Intersil materials declarations must be confirmed via the manufacturer's DPP or compliance letter per the datasheet. AEC-Q100 does not apply — this is a generic industrial ADC, not an automotive-qualified part.
