ISL99227FRZ-T - Smart Power Stage 60A PQFN-32 | Renesas
部品番号: ISL99227FRZ-T ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $4.5 | $4.50 |
| 10 | $4.05 | $40.50 |
| 100 | $3.6 | $360.00 |
| 500 | $3.2 | $1,600.00 |
| 1,000 | $2.85 | $2,850.00 |
ISL99227FRZ-T 概要
What is a Smart Power Stage? A Smart Power Stage is a fully integrated power block that combines the synchronous buck MOSFETs, driver IC, and telemetry (current-sense, temperature-sense) into a single package. It sits downstream of a multiphase PWM controller and replaces the discrete DrMOS-plus-shunt-sensor stack, simplifying PCB routing, shrinking loop inductance, and improving efficiency at high switching frequencies (typically 600 kHz to 2 MHz). Smart Power Stages belong to the broader hierarchy: power MOSFET driver / DrMOS -> power management IC -> semiconductor.
Key features include a 3.3V/5V-compatible tri-state PWM input, integrated fault protection (UVLO, over-temperature, over-current), an open-drain fault flag (FAULT#), and accurate IMON/ITMON analog telemetry outputs. The integrated current monitor eliminates the external inductor DCR sense network and its associated NTC thermistor, reducing BOM count and improving accuracy across temperature.
Typical applications include VR12.5/VR13 server and datacenter core regulators, networking ASIC and FPGA rails, telecom DC/DC bricks, and high-current GPU/CPU multiphase VRs where each phase uses one ISL99227. The tri-state PWM interface ensures robust start-up and clean shutdown with the ISL68xxx/ISL69xxx family controllers, while the integrated protections let the system meet server-grade reliability requirements without a separate supervisor IC.
Designers should pair this part with a multiphase controller such as ISL68127 or ISL69147 (same Renesas family) and add 4x 22uF ceramic input capacitors plus a 1uF bootstrap cap per phase. The PQFN-32 exposed pad is the primary thermal path - use a 4-layer PCB with at least 1 sq-in top copper pour for 60A operation; thinner PCBs will trip OTP. Estimate: with 12V VIN, 1V VOUT, 60A load, 94% efficiency, dissipation is ~3.8W per phase and theta_JA must stay under 10 C/W for safe Tj<125C.
ドロップイン代替品: ISL99227FRZ-T — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
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ISL99227BFRZ-T
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ISL99227FRZ
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ISL99227HRZ-T
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ISL99227FRZ-T 最大定格＆電気的特性
| Product Type | Smart Power Stage (SPS) / DrMOS module |
| 機能 | Integrated high-side/low-side MOSFETs + driver + current/temperature monitor |
| Output Current (per phase) | 60 A |
| PWM Input Compatibility | 3.3 V / 5 V tri-state |
| Integrated Protections | UVLO, over-temperature (OTP), over-current (OCP) |
| Fault Output | Open-drain FAULT# pin |
| Current Monitor Output | IMON analog output (proportional to inductor current) |
| Temperature Monitor Output | ITMON analog output (proportional to die temperature) |
| Compatible Controllers | ISL68xxx / ISL69xxx Digital Multiphase Controllers, ISL6617A phase doubler |
| パッケージ | 32-PQFN (5x5 mm) with exposed thermal pad |
| RoHS ステータス | Compliant |
| 実装タイプ | Surface Mount |
ISL99227FRZ-T ピン構成
| ピン 1 | PWM — Tri-state PWM input (3.3V/5V logic) |
| ピン 2 | LGND — Low-side gate driver ground return |
| ピン 3 | BOOT — Bootstrap supply for high-side gate driver |
| ピン 4 | LX — Phase node (switching node to output inductor) |
| ピン 5 | VCC — Driver IC supply (decouple with 1 uF) |
| ピン 6 | VIN — Power input (high-side drain supply) |
| ピン 7 | NC — Not connected (per datasheet) |
| ピン 8 | NC — Not connected (per datasheet) |
| ピン 9 | FAULT# — Open-drain fault output (active low) |
| ピン 10 | NC — Not connected (per datasheet) |
| ピン 11 | IMON — Analog current monitor output |
| ピン 12 | ITMON — Analog temperature monitor output |
| ピン 13 | NC — Not connected (per datasheet) |
| ピン 14 | NC — Not connected (per datasheet) |
| ピン 15 | NC — Not connected (per datasheet) |
| ピン 16 | NC — Not connected (per datasheet) |
| ピン 17 | NC — Not connected (per datasheet) |
| ピン 18 | NC — Not connected (per datasheet) |
| ピン 19 | NC — Not connected (per datasheet) |
| ピン 20 | NC — Not connected (per datasheet) |
| ピン 21 | PGND — Power ground (low-side source) |
| ピン 22 | PGND — Power ground (low-side source) |
| ピン 23 | PGND — Power ground (low-side source) |
| ピン 24 | PGND — Power ground (low-side source) |
| ピン 25 | NC — Not connected (per datasheet) |
| ピン 26 | NC — Not connected (per datasheet) |
| ピン 27 | NC — Not connected (per datasheet) |
| ピン 28 | NC — Not connected (per datasheet) |
| ピン 29 | NC — Not connected (per datasheet) |
| ピン 30 | VIN — Power input (high-side drain supply) |
| ピン 31 | VCC — Driver IC supply (decouple with 1 uF) |
| ピン 32 | LGND — Low-side gate driver ground return |
主な用途
ISL99227FRZ-T の用途: 6 件s: Server CPU/GPU Core VR (VR12.5 / VR13), Datacenter 48V-to-Point-of-Load Conversion, Networking ASIC / FPGA Power Rails, AI Accelerator and GPU Boards, Telecom DC/DC Brick Modules, Industrial High-Current POL Regulators.
Server CPU/GPU Core VR (VR12.5 / VR13)
The ISL99227FRZ-T is purpose-built for server-class multiphase VR12.5/VR13 core regulators where each phase must deliver up to 60 A cleanly at 600 kHz-2 MHz switching. Its integrated IMON and ITMON telemetry directly feed the ISL68xxx/ISL69xxx Digital Multiphase Controller for accurate per-phase current balancing and adaptive voltage positioning (AVP), critical for dynamic load transients from multi-core CPUs. Compared with discrete DrMOS designs the SPS eliminates external DCR sense networks, cutting BOM by 4-6 parts per phase. The integrated UVLO/OTP/OCP and open-drain FAULT# output meet server-grade telemetry and reliability targets.
おすすめ
Datacenter 48V-to-Point-of-Load Conversion
In 48V-to-PoL architectures the ISL99227FRZ-T sits on the secondary side of an isolated DC/DC bus converter (e.g. ISL850xx or ISL980xx family) forming the final synchronous buck stage to the load. Each phase carries up to 60 A at high frequency, and multiple phases are stacked (3+ phases) to deliver 150-300 A rails for GPUs, TPUs, and AI accelerators. The 32-PQFN 5x5 footprint keeps the solution compact under the inductor - critical for the dense PoL layout typical of OCP accelerator cards. Renesas's tri-state PWM protocol ensures clean start-up/shutdown with ISL68xxx controllers during 48V bus transients.
おすすめ
Networking ASIC / FPGA Power Rails
High-end networking ASICs and FPGAs in switches/routers require multiple low-voltage high-current rails (typically 0.7-1.2 V at 30-120 A) with tight regulation. The ISL99227FRZ-T's 60 A per-phase rating and high-accuracy IMON output support dynamic load steps typical of packet-processing ASICs that swing from sleep to full-burst in microseconds. Its tri-state PWM and FAULT# outputs integrate cleanly with ISL69xxx controllers used in networking reference designs. Renesas datasheets show typical 12V-Vin / 1V-Vout efficiency >94% at 600 kHz, minimising thermal dissipation in sealed chassis.
おすすめ
AI Accelerator and GPU Boards
AI training boards (GPUs, TPUs, custom accelerators) demand 200-600 A rails sourced from 6-12 parallel phases. Each ISL99227FRZ-T phase contributes up to 60 A with telemetry that the controller uses for per-phase current sharing and thermal balancing - essential when phases are physically distributed across a large PCB. The integrated OTP protects phases when AI workloads create localised hot spots; the FAULT# pin flags the host BMC for graceful workload migration. Renesas designs typically use 8-12 ISL99227 phases with two ISL68127 controllers for 480-720 A rails in flagship AI cards.
おすすめ
Telecom DC/DC Brick Modules
The ISL99227FRZ-T is qualified for use inside telecom brick modules (e.g. 12V-input intermediate bus converters feeding PoL rails). Its 60 A per-phase capability and integrated current/temperature monitors enable brick designs that meet NEBS and ETSI thermal/reliability specs without external sense circuitry. The 32-PQFN 5x5 package footprint allows the SPS to be mounted directly under the output inductor for minimum LX-loop inductance, reducing ringing and improving efficiency above 1 MHz. The FAULT# pin is wired to the brick's supervisory microcontroller for system-level fault logging.
おすすめ
Industrial High-Current POL Regulators
Industrial PLCs, test instruments, and factory-automation controllers need compact, high-current POL rails with telemetry. The ISL99227FRZ-T fits 2-4 phase designs delivering 120-240 A at 1-3.3 V outputs with industrial temperature compliance. Its tri-state PWM interface simplifies sequencing across multiple rails in industrial backplanes, while the integrated OTP/OCP eliminates the need for separate supervisor ICs. Compared to discrete DrMOS stacks the SPS simplifies EMI compliance by reducing switching-node parasitics - critical for IEC 61000-4 industrial environments.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: ISL99227FRZ-T — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | ISL99227BFRZ-T | ISL99227FRZ | ISL99227HRZ-T |
|---|---|---|---|---|
| Brand | Renesas Electronics | Renesas Electronics | Renesas Electronics | Renesas Electronics |
| Package | PQFN-32 (5x5 mm) | PQFN-32 (5x5 mm) - same | PQFN-32 (5x5 mm) - same | PQFN-32 (5x5 mm) - same |
| Output Current (per phase) | 60 A | 60 A | 60 A | 60 A |
| Compatible Controller | ISL68xxx / ISL69xxx DMP | ISL6617A phase doubler | ISL68xxx / ISL69xxx DMP | ISL68xxx / ISL69xxx DMP |
| PWM Interface | 3.3V/5V tri-state | 3.3V/5V tri-state | 3.3V/5V tri-state | 3.3V/5V tri-state |
| Integrated IMON/ITMON | Yes | Yes | Yes | Yes |
| Integrated Protections (UVLO/OTP/OCP) | Yes | Yes | Yes | Yes |
| FAUX/FAULT# Output | Open-drain FAULT# | Open-drain FAULT# | Open-drain FAULT# | Open-drain FAULT# |
| RoHS Compliance | Yes | Yes | Yes | Yes |
主な差別化要因
- Integrated IMON/ITMON telemetry eliminates external DCR sense （vs Discrete DrMOS + external DCR sense network)
- Single-supply tri-state PWM interface compatible with Renesas DMP controllers （vs Generic DrMOS requiring bootstrap PWM signalling)
- Open-drain FAULT# output supports per-phase fault isolation （vs Discrete DrMOS without integrated fault output)
設計ノート
The 32-PQFN exposed pad is the dominant heat path. Estimated: at VIN=12V, VOUT=1V, 60 A load and 94% efficiency, per-phase dissipation is ~3.8W. A 4-layer PCB with at least 1 sq-in top copper (2 oz recommended) keeps theta_JA under ~10 C/W; without adequate copper the junction will trip OTP and the FAULT# pin asserts. Place thermal vias in the exposed pad (12-16 vias, 0.3 mm drill) to inner copper planes.
Per Renesas datasheet layout guidelines: place 4x 22 uF X7R 0805 ceramic input capacitors within 5 mm of the high-side drain pins (VIN). Keep the bootstrap capacitor (1 uF X7R 0603) within 2 mm of the BST pin. The LX switching node trace must be short and wide; minimise loop area between LX, the low-side FET, and PGND. Route IMON and ITMON traces guarded from LX coupling by a GND keep-out to preserve telemetry accuracy.
Do not confuse ISL99227 (ISL68xxx/ISL69xxx controllers) with ISL99227B (ISL6617A doubler) - same footprint but different PWM protocol and the system will not start if swapped. The FAULT# pin is open-drain and requires a pull-up (typically 10 kOhm to 3.3V). Always place the 1 uF VCC bypass within 3 mm of the VCC pin and the 0.1 uF VCC bypass adjacent. Do not float LGND - tie each LGND pin to the inner GND plane with multiple vias.
The tri-state PWM input is robust but requires clean edges; place a 10 Ohm source-series resistor close to the controller PWM output to dampen ringing. The IMON and ITMON analog outputs are high-impedance; guard them from the LX switching node with a GND trace to avoid capacitive coupling that would corrupt current/temperature telemetry. Keep IMON/ITMON trace length under 25 mm when possible.
コンプライアンス情報
RoHS compliant per Renesas product page. Industrial/commercial grade - not AEC-Q100 qualified for automotive. Halogen-free status not confirmed from Verified Web Data.
