LAN9420-NU - PCI Fast Ethernet Controller | Microchip
部品番号: LAN9420-NU ✗ 生産終了| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $4.9282 | $4.93 |
| 10 | $0 | $0.00 |
| 100 | $0 | $0.00 |
| 500 | $0 | $0.00 |
| 1,000 | $0 | $0.00 |
LAN9420-NU 概要
What is a Fast Ethernet controller? A Fast Ethernet controller is an integrated semiconductor that connects a host system to a 10/100BASE-T Ethernet network. It combines protocol processing, media access control, physical-layer signaling, and often host-bus or DMA functions into one device. In the broader hierarchy, the LAN9420-NU is an Ethernet controller, a network interface controller, an interface IC, and ultimately a semiconductor.
Key verified features include a PCI Local Bus Specification Revision 3.0-compliant interface, integrated DMA controller, Ethernet MAC, and 10/100 Ethernet PHY. The manufacturer documentation also identifies a system configuration diagram for the LAN9420/LAN9420i family and describes memory-mapped control and status registers. These features reduce the number of external networking components required in a PCI embedded platform.
The controller is designed for embedded systems that need Fast Ethernet connectivity without a separate external Ethernet PHY. Its integrated architecture can simplify board design while preserving a conventional PCI host interface. The verified operating specification is 0°C to 70°C, making it suited to systems requiring a commercial-temperature component where that range is appropriate.
Typical applications include industrial automation equipment, embedded instrumentation, consumer electronics, and PCI-based data-acquisition or communication systems. The exact host platform, clocking, transceiver, connector, power supply, and firmware requirements still need to be verified against the complete manufacturer datasheet before design release. The LAN9420-NU should not be selected solely from the distributor summary when detailed electrical, timing, and register requirements are needed.
For layout, follow the manufacturer placement checklist and keep the specified bypass capacitors close to the relevant power pins, including the core and PLL supplies. Validate signal integrity, reset behavior, interrupt routing, DMA configuration, and thermal performance on the final board. This page distinguishes verified facts from parameters that require confirmation from the complete LAN9420/LAN9420i datasheet.
ドロップイン代替品: LAN9420-NU — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
クイック比較ツール — 並列比較する代替部品を選択:
LAN9420I-NU
✅ ドロップイン📋 参考代替品（カタログ未掲載）
USB2250-NU-06
✅ ドロップイン📋 参考代替品（カタログ未掲載）
LAN9420-NU 仕様
| Device Type | Ethernet controller |
| Technology | PCI, CMOS |
| Ethernet Standard | 10/100 Base-T/TX Fast Ethernet |
| Host Interface | PCI Local Bus Specification Revision 3.0 compliant |
| Integrated Blocks | DMA controller, Ethernet MAC, 10/100 Ethernet PHY |
| 電源電圧 | 3.3 V |
| 動作温度 | 0°C to 70°C |
| パッケージ | 128-pin VTQFP |
| Package Family | VTQFP |
| Surface-Mount Package | Yes |
| Memory-Mapped Control | Control and status registers |
| Timer | 16-bit configurable General Purpose Timer |
| Free-Run Counter | Available |
| GPIO/LED Interface | 3-pin configurable GPIO/LED interface |
| GPO Pins | 2 |
LAN9420-NU yes ピン配置ガイド
LAN9420-NU (yes パッケージ) のピン配置。 ピン番号、機能、接続図はメーカーのデータシートで定義されています。正確なフットプリントとはんだ付けのガイドラインについては、データシートを参照してください。
詳細なピン配置データはありません: LAN9420-NU.
詳細は データシート をご参照ください。
主な用途
LAN9420-NU の用途: 6 件s: PCI Embedded Control Systems, Industrial Automation Equipment, Data Acquisition and Test Equipment, Embedded Consumer Electronics, Networked Instrumentation, PCI Communication Gateways.
PCI Embedded Control Systems
The LAN9420-NU is a practical choice for PCI-based embedded controllers that need a compact 10/100 Ethernet connection. Its integrated PCI Local Bus Specification Revision 3.0-compliant interface, DMA controller, Ethernet MAC, and 10/100 PHY can reduce the number of separate network devices in the host design. The device is specified for a 3.3 V supply and a 0°C to 70°C operating range, so the system should verify its rail sequencing, thermal environment, and host timing against the complete manufacturer datasheet before production.
おすすめ
Industrial Automation Equipment
For industrial automation equipment operating within the verified 0°C to 70°C range, the LAN9420-NU can provide a single-chip Fast Ethernet endpoint with PCI host connectivity. Integrating the DMA controller, MAC, and PHY helps simplify the network path from the embedded processor or PCI bus to a 10/100BASE-T network. The design still needs industrial-grade connector and magnetics planning, surge protection, grounding, EMC validation, and a confirmed operating-temperature requirement for the complete product enclosure.
おすすめ
Data Acquisition and Test Equipment
The LAN9420-NU can support networked data-acquisition and test equipment built around a PCI host. Its 10/100 Ethernet MAC and PHY provide a network transport path, while the integrated DMA controller can support efficient movement of data between the PCI system and the Ethernet engine. Designers should confirm DMA behavior, interrupt handling, register compatibility, timing, and clock requirements in the manufacturer documentation. The 128-pin VTQFP package also requires careful high-pin-count layout and assembly planning.
おすすめ
Embedded Consumer Electronics
The integrated PCI, DMA, MAC, and 10/100 PHY architecture makes the LAN9420-NU relevant to embedded consumer products that expose an Ethernet service through a PCI-compatible host. A single-chip network path can simplify board partitioning when the product already uses a PCI bus and does not require faster than 100 Mb/s Ethernet. The designer must still budget for Ethernet magnetics, RJ45 or alternative connectors, isolation, power regulation, chassis or enclosure requirements, and product-specific EMC testing.
おすすめ
Networked Instrumentation
For instrumentation that needs remote control or telemetry over 10/100 Ethernet, the LAN9420-NU can act as the PCI-facing network controller. Its integrated 10/100 PHY avoids requiring a separate PHY in the basic architecture, while the MAC and DMA blocks support Ethernet frame processing and host transfer. For measurement accuracy, keep noisy analog and switching circuitry away from the controller, use controlled reference and clock distribution, and validate interrupt latency and data integrity across the complete instrument signal chain.
おすすめ
PCI Communication Gateways
The LAN9420-NU is suitable as a building block for PCI communication gateways that bridge an embedded host to a 10/100 Ethernet segment. Its PCI interface and DMA controller can sit between host memory and the Ethernet MAC, while the integrated PHY simplifies the physical-layer implementation. Gateway designs should define buffering, timeout behavior, security, protocol handling, watchdog behavior, and recovery procedures in firmware. They should also verify the 3.3 V supply and 0°C to 70°C range against the enclosure and deployment environment.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: LAN9420-NU — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | LAN9420I-NU | USB2250-NU-06 |
|---|---|---|---|
| Device Type | 10/100 Base-T/TX Ethernet controller | 10/100 Ethernet controller; related family member | Ethernet controller; separate family comparison result |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology |
主な差別化要因
- Integrated PCI-to-Ethernet architecture （vs LAN9420I-NU)
- Single-chip 10/100 networking integration （vs USB2250-NU-06)
- Commercial-temperature operating range （vs LAN9420I-NU)
- Distributed sourcing visibility （vs Generic PCI Ethernet controller alternatives)
設計ノート
Use the Microchip LAN9420 VTQFP placement checklist as the layout baseline. The supplied checklist specifically states that the VDD18CORE bypass capacitors use 0.01 µF and should be placed as close as possible to pins 9 and 82, and that the VDD18PLL capacitor should also be close to its power pin. Preserve the recommended pin orientation, thermal-pad or exposed-connection requirements, and package land pattern from the official drawings before fabrication.
Plan the PCI and Ethernet paths as controlled-impedance interfaces rather than treating all nets as ordinary low-speed digital connections. Separate clock, data, reset, and power-return paths where the datasheet and system architecture permit, and provide termination only where required by the relevant interface specification. Because the supplied data does not provide the complete timing tables or board stack-up values, validate signal integrity with the final controller, connector, magnetics, and enclosure implementation.
The verified distributor specification identifies a 3.3 V supply for the LAN9420-NU, but it does not replace the manufacturer’s detailed power-tree requirements. Confirm all rail names, tolerances, sequencing, current limits, and decoupling values from the official datasheet. Keep high-current and switching-supply nodes away from sensitive clock and Ethernet areas, and include test points for startup, steady-state voltage, ripple, and reset behavior.
Do not assume that a 128-pin VTQFP package is thermally sufficient without checking the actual dissipation and PCB construction. Use the manufacturer package thermal information, copper area, airflow, ambient temperature, and the system’s maximum traffic duty cycle in the thermal assessment. If the controller operates near the verified 70°C upper limit, verify the full board temperature and junction margin rather than relying only on ambient specifications.
A related family name does not automatically establish drop-in compatibility. Before substituting LAN9420I-NU or another candidate, compare the exact package drawing, pin names, power rails, strap options, reset behavior, interrupt polarity, register map, DMA behavior, timing, and firmware assumptions. The supplied cross-reference results do not verify a fully qualified substitute, so any replacement decision requires manufacturer data and board-level testing.
コンプライアンス情報
The supplied verified data does not explicitly state RoHS, REACH, AEC-Q100, lead-free, halogen-free, or conflict-minerals status for LAN9420-NU. Obtain current compliance documentation for the exact orderable part before regulated use.
