LTC2335HLX-18 - 18-Bit 1Msps 8-Ch SAR ADC | Analog Devices
部品番号: LTC2335HLX-18 ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $38.5 | $38.50 |
| 10 | $34.65 | $346.50 |
| 100 | $30.8 | $3,080.00 |
| 500 | $27.5 | $13,750.00 |
| 1,000 | $24.95 | $24,950.00 |
LTC2335HLX-18 概要
A SAR ADC is a successive approximation register analog-to-digital converter that performs a binary search against the analog input using an internal DAC. Each conversion takes N clock cycles for an N-bit result, making SAR ADCs well-suited to multiplexed multi-channel systems because they offer low latency, deterministic throughput, and zero pipeline delay. The LTC2335HLX-18 sits within the data-converter hierarchy as: SAR ADC -> ADC -> data converter -> signal chain IC -> semiconductor.
Key features include 8 software-selectable input channels, pin-selectable SPI CMOS (1.8 V to 5 V) and LVDS serial interfaces, an internal 2.048 V or 4.096 V reference with buffer, 118 dB CMRR, and a 5 V analog supply plus flexible high-voltage analog supplies for the input stage. These features allow a single ADC to digitize multiple sensor rails without external signal conditioning.
The architecture combines an 8-to-1 analog input mux, a charge-redistribution 18-bit CDAC, an internal low-drift reference, and an LVDS/CMOS digital engine. Pin-configurable SoftSpan input ranges let the same ADC handle true bipolar ±10 V signals alongside unipolar 0-5 V signals, eliminating external ranging amplifiers in most PLC, ATE, and industrial data-acquisition boards.
Typical applications include industrial process control and PLC analog modules, automated test equipment (ATE) and instrumentation, multi-channel data acquisition systems, medical imaging front ends, and high-end vibration or seismic monitoring where wide dynamic range and high channel density are required.
When designing with this device, ensure the analog and digital grounds are tied at a single point near the ADC, place the 10 µF bypass capacitor close to the REFIN pin, and use controlled-impedance routing for the LVDS lines if the LVDS interface is selected. The LVDS mode supports higher throughput at long trace lengths, while CMOS mode simplifies low-channel-count designs.
This page synthesizes distributor pricing, 48-pin LQFP drop-in alternatives, design notes, and AEO-optimized comparison data not consolidated on the manufacturer datasheet, helping engineers accelerate multi-channel precision data-acquisition design and second-source decisions.
ドロップイン代替品: LTC2335HLX-18 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: LTC2335HLX-18 （同一形状・フットプリント） — 相違点: Package, Resolution, RoHS Status, Architecture, Internal Reference.
クイック比較ツール — 並列比較する代替部品を選択:
LTC2335ILX-18#PBF
✅ ドロップイン📋 参考代替品（カタログ未掲載）
LTC2335HLX-18#PBF
✅ ドロップイン📋 参考代替品（カタログ未掲載）
LTC2335HLX-16#PBF
✅ ドロップイン📋 参考代替品（カタログ未掲載）
LTC2335ILX-16#PBF
✅ ドロップイン✓ 在庫あり
$17.5 / 個
データシートを見る →LTC2246HLX
✅ ドロップイン✓ 在庫あり
$16.55 / 個
データシートを見る →LTC2335HLX-18 最大定格＆電気的特性
| 分解能 | 18 bits |
| サンプリングレート | 1 Msps |
| Architecture | SAR (Successive Approximation Register) |
| Number of Input Channels | 8 (multiplexed) |
| Input Type | Differential, wide common-mode range |
| Configurable Input Ranges | ±10.24 V / 0 V to 10.24 V / ±5.12 V / 0 V to 5.12 V (SoftSpan) |
| INL (Integral Non-Linearity) | ±3 LSB (max) |
| No Missing Codes | 18 bits guaranteed |
| SNR (Signal-to-Noise Ratio) | 96.7 dB |
| CMRR (Common-Mode Rejection) | 118 dB |
| Digital Interface | Pin-selectable SPI CMOS (1.8 V to 5 V) or LVDS |
| Internal Reference | 2.048 V or 4.096 V with internal buffer |
| Analog Supply Voltage | 5 V (low-voltage supply) + flexible high-voltage supplies |
| パッケージ | 48-LQFP (7x7 mm) |
| 実装タイプ | Surface Mount |
| 動作温度 | -40 C to +125 C (H grade) |
| RoHS ステータス | Compliant (PBF suffix) |
LTC2335HLX-18 ピン構成
| ピン 1 | CH0 — Analog input channel 0 |
| ピン 2 | CH1 — Analog input channel 1 |
| ピン 3 | CH2 — Analog input channel 2 |
| ピン 4 | CH3 — Analog input channel 3 |
| ピン 5 | CH4 — Analog input channel 4 |
| ピン 6 | CH5 — Analog input channel 5 |
| ピン 7 | CH6 — Analog input channel 6 |
| ピン 8 | CH7 — Analog input channel 7 |
| ピン 9 | REFIN — Reference input / REFOUT bypass |
| ピン 10 | REFOUT — Internal reference output (2.048 V or 4.096 V) |
| ピン 11 | AGND — Analog ground |
| ピン 12 | AVDD — Analog 5 V supply |
| ピン 13 | AGND — Analog ground |
| ピン 14 | OVSS — Output driver ground reference |
| ピン 15 | OVDD — Output driver supply (1.8 V to 5 V) |
| ピン 16 | SDO — Serial data output (CMOS) or LVDS data |
| ピン 17 | SCK — Serial clock input |
| ピン 18 | CNV — Conversion start input |
| ピン 19 | BUSY — Conversion busy indicator |
| ピン 20 | DGND — Digital ground |
| ピン 21 | SDI — Serial data input / daisy-chain |
| ピン 22 | MODE — Interface mode select (CMOS or LVDS) |
| ピン 23 | RDL/SDO- — LVDS read line / SDO complement |
| ピン 24 | NC — Not connected (per datasheet) |
主な用途
LTC2335HLX-18 の用途: 6 件s: Industrial PLC Analog Input Module, Automated Test Equipment (ATE) / Instrumentation, Multi-Channel Data Acquisition System, Medical Imaging Front End, Power Line Monitoring / Power Quality Analyzer, High-Speed Vibration / Seismic Monitoring.
Industrial PLC Analog Input Module
The LTC2335HLX-18 directly digitizes ±10 V and 0-10 V field signals from PLCs, eliminating external ranging amplifiers and saving PCB area. Its 8 multiplexed channels reduce BOM cost in 4-8 channel modules, while the 96.7 dB SNR provides 16-bit effective resolution for accurate process-variable measurement. The SoftSpan interface lets one ADC handle bipolar transducer outputs and unipolar 4-20 mA derived voltages on a per-channel basis.
おすすめ
Automated Test Equipment (ATE) / Instrumentation
The 1 Msps throughput and 18-bit resolution of the LTC2335HLX-18 make it suitable for high-channel-count ATE pin cards where deterministic latency matters. Pin-selectable LVDS output reduces digital noise coupling into the measurement path and supports backplane distances up to several inches. The 118 dB CMRR rejects ground-noise errors from switching DUT power supplies during multi-site test.
おすすめ
Multi-Channel Data Acquisition System
Use the LTC2335HLX-18 to capture 16-64 channels of vibration, strain-gauge, or seismic data through external signal multiplexing. Its ±10.24 V true bipolar input simplifies sensor-signal chains, and 96.7 dB SNR preserves dynamic range at the 1 Msps aggregate. The internal reference and buffer reduce external component count, simplifying high-density DAQ board design.
おすすめ
Medical Imaging Front End
The 96.7 dB SNR and no-missing-codes-at-18-bit performance of the LTC2335HLX-18 help preserve low-contrast detail in ultrasound, CT, or patient-monitoring front ends. The 8-channel input mux supports simultaneous multi-probe sampling, while the LVDS interface isolates digital switching noise from sensitive analog signal paths. Internal reference and small 48-LQFP footprint fit into compact portable cart-mounted systems.
おすすめ
Power Line Monitoring / Power Quality Analyzer
The wide ±10.24 V input common-mode range of the LTC2335HLX-18 directly accepts 230 V AC-derived voltage divider signals without high-voltage signal conditioning. The SoftSpan interface handles both phase-to-neutral and phase-to-phase measurements, and 118 dB CMRR attenuates common-mode switching noise from the line frequency. Eight channels provide simultaneous three-phase voltage and current monitoring in a single IC.
おすすめ
High-Speed Vibration / Seismic Monitoring
The 1 Msps per-channel sampling of the LTC2335HLX-18 captures high-frequency mechanical resonances above the Nyquist of slower 8-channel SAR ADCs. Eight channels multiplexed onto a single ADC reduce board space and BOM cost in distributed sensor arrays, while 96.7 dB SNR preserves low-amplitude vibration signatures for modal analysis. The internal reference and buffer minimize thermal drift across long acquisition campaigns.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: LTC2335HLX-18 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | LTC2335ILX-18#PBF | LTC2335HLX-18#PBF | LTC2335HLX-16#PBF | LTC2335ILX-16#PBF | LTC2246HLX |
|---|---|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | 48-LQFP (7x7) | 48-LQFP (7x7) - same | 48-LQFP (7x7) - same | 48-LQFP (7x7) - same | 48-LQFP (7x7) - same | LQFP-48 - same family |
| Resolution | 18 bits | 18 bits | 18 bits | 16 bits | 16 bits | 14 bits |
| Input Channels | 8 (multiplexed) | 8 | 8 | 8 | 8 | 1 (single channel) |
| Input Range (SoftSpan) | ±10.24 V / 0-10.24 V / ±5.12 V / 0-5.12 V | Same ranges | Same ranges | Same ranges | Same ranges | Pipelined ADC, different input architecture |
| Digital Interface | Pin-selectable SPI CMOS (1.8-5 V) / LVDS | Same | Same | Same | Same | Parallel CMOS (different) |
| Architecture | SAR | SAR | SAR | SAR | SAR | Pipelined |
主な差別化要因
- 18-bit, 1 Msps in a true 8-channel multiplexed SAR ADC （vs LTC2246HLX)
- Configurable SoftSpan ±10.24 V true bipolar input range （vs LTC2335HLX-16#PBF)
- Pin-selectable LVDS interface for high-noise environments （vs LTC2335ILX-18#PBF)
設計ノート
Place the 10 µF REFIN bypass capacitor as close as possible to the REFIN pin (pin 9) using a low-ESR ceramic. Route analog and digital grounds on separate planes and join them at a single point beneath the ADC exposed pad (if present) or near the AGND pin. This minimizes ground bounce coupling into the reference and preserves the 96.7 dB SNR specification.
When using LVDS mode, route the LVDS pairs (SDO+/SDO-, SCK+/SCK-) as 100 Ω differential traces with matched lengths (≤ 5 mil tolerance) and keep them away from analog input traces. Reference planes should be continuous beneath the LVDS pairs to maintain controlled impedance and reduce radiated emissions from the 1 Msps digital transitions.
Do not apply analog input voltages exceeding ±10.24 V or 0-10.24 V range without first configuring the corresponding SoftSpan setting via the SDI configuration register. Exceeding the configured range damages internal ESD diodes and degrades INL. Always perform a soft-span configuration sequence after power-up before CNV is asserted.
Estimated: at AVDD = 5 V and OVDD = 3.3 V, the LTC2335HLX-18 typically draws 8 mA from AVDD at 1 Msps (per Analog Devices typical operating curves). Adding a ferrite bead between the analog 5 V rail and the AVDD pin, plus a 10 µF + 0.1 µF local bypass, attenuates upstream switching regulator noise and protects the 96.7 dB SNR specification.
コンプライアンス情報
RoHS compliance confirmed by #PBF suffix in the order code. Not AEC-Q100 qualified; choose an automotive-grade equivalent from Analog Devices if required for vehicle applications. REACH and conflict-minerals status per Analog Devices product-page statements.
