MAX172ACWG - 12-Bit 10us CMOS ADC with Internal Reference | Analog Devices
部品番号: MAX172ACWG ✗ 生産終了| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $12.45 | $12.45 |
| 10 | $11.2 | $112.00 |
| 100 | $9.85 | $985.00 |
| 500 | $8.4 | $4,200.00 |
| 1,000 | $7.1 | $7,100.00 |
MAX172ACWG 概要
An ADC (analog-to-digital converter) is a data converter IC that samples a continuous analog input voltage and produces a discrete digital code proportional to that voltage. Within the broader semiconductor taxonomy, an ADC sits under data converters -> converter ICs -> signal chain -> mixed-signal semiconductor. The 12-bit resolution provides 4096 discrete codes (LSB weight = VREF / 4096), making this part well-suited to instrumentation, process control, and signal-acquisition front ends that do not require 16- or 24-bit precision but still need reliable 0.024% resolution and low integral non-linearity.
Key specifications of the MAX172ACWG include a 10us maximum conversion time, 100 ksamples/s throughput, single +5V supply operation, internal buried-zener reference with low drift, and parallel digital output. The ADC uses a successive-approximation architecture with an on-chip clock, simplifying external circuit design. The internal reference typically provides 10 V (with the ±5V input range option) or 2.5 V alternative reference depending on configuration, and uses a buried-zener structure for low temperature drift and low broadband noise.
The MAX172 architecture uses a charge-redistribution DAC array, a comparator, and a successive-approximation register (SAR). The buried-zener reference is laser-trimmed during manufacture for low initial error and provides typical drift under 20 ppm/C. The integrated track/hold handles full-scale input bandwidths beyond what the 10us conversion would otherwise allow, making it suitable for multiplexed multi-channel data-acquisition systems using an external analog mux.
Typical applications for the MAX172ACWG include industrial process-control front-ends, portable data loggers, precision instrumentation, automated test equipment, and panel-meter designs. The wide-body 24-pin SOIC footprint also simplifies hand prototyping and rework on legacy through-hole-style PCB layouts where DIP-style ADCs (such as the MAX172ACNG variant) are not desired.
When designing with this part, ensure that the analog input signal is buffered with a low-impedance driver to avoid conversion errors caused by input-charge kickback from the internal track/hold. Decouple VDD and VLOGIC with 0.1 uF ceramic capacitors placed within 5 mm of the supply pins, and place the analog input traces away from digital output switching to minimize crosstalk. For multi-channel systems, add an external sample-and-hold or fast analog mux upstream of the MAX172ACWG input.
This page synthesizes distributor pricing, drop-in pin-compatible alternatives, and practical design notes not found in the standalone manufacturer datasheet, enabling faster engineering decisions for both new designs and legacy 12-bit ADC redesigns.
ドロップイン代替品: MAX172ACWG — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
クイック比較ツール — 並列比較する代替部品を選択:
MAX172BCWG
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MAX172BCWG+T
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MAX172ACWG+T
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MAX172BCWG+
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MAX172ACWG+
✅ ドロップイン📋 参考代替品（カタログ未掲載）
MAX172ACWG 最大定格＆電気的特性
| 分解能 | 12 bits |
| Architecture | SAR (Successive Approximation) |
| Number of Channels | 1 |
| Conversion Time | 10 us (max) |
| Throughput (Max Sample Rate) | 100 ksamples/s |
| Input Type | Single-Ended, Unipolar or Bipolar (per input range config) |
| Internal Reference Type | Buried-Zener, laser-trimmed |
| 電源電圧 | +5 V (single supply); ±5 V (analog supply range option) |
| Digital Output Interface | Parallel (8/12-bit selectable) |
| パッケージ | 24-pin SOIC (wide body) |
| 実装タイプ | Surface Mount |
| 動作温度 | 0 C to +70 C (commercial grade, 'C' suffix) |
| Screening Level | Commercial |
MAX172ACWG ピン構成
| ピン 1 | V+ — Positive analog supply (+5 V or +12 V) |
| ピン 2 | AIN — Analog input |
| ピン 3 | AGND — Analog ground |
| ピン 4 | REF — Reference voltage (bypass to AGND) |
| ピン 5 | VREF — Reference output / bypass node |
| ピン 6 | BIP — Bipolar offset adjust |
| ピン 7 | RANGE — Input range select |
| ピン 8 | MODE — Mode select / conversion control |
| ピン 9 | CS — Chip select (active low) |
| ピン 10 | RD — Read control (active low) |
| ピン 11 | WR — Write / convert start (active low) |
| ピン 12 | DGND — Digital ground |
| ピン 13 | VLOGIC — Logic supply voltage (+5 V) |
| ピン 14 | DB11 — Data output bit 11 (MSB) |
| ピン 15 | DB10 — Data output bit 10 |
| ピン 16 | DB9 — Data output bit 9 |
| ピン 17 | DB8 — Data output bit 8 |
| ピン 18 | DB7 — Data output bit 7 |
| ピン 19 | DB6 — Data output bit 6 |
| ピン 20 | DB5 — Data output bit 5 |
| ピン 21 | DB4 — Data output bit 4 |
| ピン 22 | DB3 — Data output bit 3 |
| ピン 23 | DB2 — Data output bit 2 |
| ピン 24 | DB1 — Data output bit 1 (LSB) |
主な用途
MAX172ACWG の用途: 6 件s: Industrial Process Control Front-End, Precision Instrumentation and Panel Meters, Portable Data Loggers, Automated Test Equipment (ATE), Legacy Sensor Interface Modules, Educational and Prototyping Boards.
Industrial Process Control Front-End
The MAX172ACWG is well suited to industrial process-control front-ends because its 12-bit resolution provides 4096 discrete codes (0.024% LSB step), 10us conversion supports 100 ksamples/s throughput, and the on-chip buried-zener reference eliminates an external precision reference. Per the MAX172 datasheet, the internal reference provides low drift for factory-floor temperature swings. Placed at the analog input of a PLC analog input module, the MAX172ACWG digitizes 4-20 mA-conditioned signals or thermocouple-amplified voltages. Compared with modern 16-bit ADCs, the MAX172ACWG trades resolution for legacy availability and a proven long-term supply chain, which matters for installed-base industrial controllers that cannot be redesigned without expensive re-qualification.
おすすめ
Precision Instrumentation and Panel Meters
Precision panel meters and bench-top instrumentation benefit from the MAX172ACWG's 12-bit resolution and internal buried-zener reference with low drift. According to the Maxim datasheet, the on-chip reference eliminates the need for an external precision reference component, simplifying the BOM and reducing calibration drift over temperature. In a digital panel meter the MAX172ACWG digitizes a conditioned sensor signal (strain gauge, load cell, or pressure transducer) with sufficient resolution to display 0-3999 counts with ±1 LSB accuracy. The 24-pin SOIC fits easily on a panel-meter main board alongside a 7-segment driver and microcontroller, and the parallel interface allows fast display updates without burdening the MCU.
おすすめ
Portable Data Loggers
The MAX172ACWG's 10us conversion time and single +5 V supply simplify battery-powered data-logger designs where power budget and PCB area are constrained. The internal reference reduces component count by removing a precision reference IC, and the wide-body SOIC-24 footprint is hand-solderable for prototype builds. Per the MAX172 datasheet, the SAR architecture provides deterministic per-sample latency, which makes sample-time-stamping in the host firmware straightforward. The MAX172ACWG sits between an analog sensor front-end (often a low-power op-amp) and a microcontroller or EEPROM that captures the digitized values. For multi-channel data loggers, an external analog mux (such as a CD4051) extends the channel count while keeping the MAX172ACWG as the shared ADC.
おすすめ
Automated Test Equipment (ATE)
ATE systems that characterize components on a production line often use a 12-bit SAR ADC for fast, repeatable measurements at known test points. The MAX172ACWG provides 100 ksamples/s throughput and 12-bit resolution, sufficient for parametric testers measuring DC bias points and slow analog waveforms. Per the MAX172 datasheet, the parallel output interface allows direct connection to a tester's digital capture logic without serial-protocol overhead. The internal buried-zener reference gives the measurement system a stable, low-noise conversion baseline, which is critical when comparing unit-to-unit test results on the production line. The wide-body SOIC package also allows easy socket replacement if a unit fails.
おすすめ
Legacy Sensor Interface Modules
Legacy sensor interface modules originally designed around the MAX172ACWG continue to rely on this part for long-term installed-base support. The MAX172ACWG's 12-bit resolution, internal reference, and parallel interface match the firmware and calibration tables already deployed in the field. Per the Analog Devices / Maxim cross-reference data, the MAX172BCWG and MAX172ACWG+ variants are drop-in compatible. Repair depots and field-service engineers use the MAX172ACWG as a direct replacement without re-qualifying the host module. New designs targeting the same module form factor can also adopt this part to take advantage of established test procedures and known EMI/EMC performance.
おすすめ
Educational and Prototyping Boards
Universities and engineering labs use the MAX172ACWG in teaching labs because the SOIC-24 package is hand-solderable on breakout boards and the 12-bit SAR architecture is conceptually simple for students. The MAX172 datasheet explains the conversion sequence step by step, making it easy to demonstrate successive-approximation concepts in lectures and labs. The internal reference removes one variable from lab measurements, allowing students to focus on input-signal conditioning, sample timing, and digital-output decoding. The wide-body SOIC footprint also allows the chip to be placed in a DIP socket adapter, enabling breadboard prototyping without spinning a custom PCB.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: MAX172ACWG — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | MAX172BCWG | MAX172BCWG+T | MAX172ACWG+T | MAX172BCWG+ | MAX172ACWG+ |
|---|---|---|---|---|---|---|
| Package | SOIC-24 (wide body) | SOIC-24 (wide body) - same | SOIC-24 (wide body) - same | SOIC-24 (wide body) - same | SOIC-24 (wide body) - same | SOIC-24 (wide body) - same |
| Brand | Analog Devices (formerly Maxim Integrated) | Analog Devices - same | Analog Devices - same | Analog Devices - same | Analog Devices - same | Analog Devices - same |
| Resolution | 12 bits | 12 bits | 12 bits | 12 bits | 12 bits | 12 bits |
| Conversion Time | 10 us | 10 us | 10 us | 10 us | 10 us | 10 us |
| Sample Rate | 100 ksamples/s | 100 ksamples/s | 100 ksamples/s | 100 ksamples/s | 100 ksamples/s | 100 ksamples/s |
| Temperature Grade | Commercial 0C to +70C | Different suffix - confirm grade | Different suffix - confirm grade | Commercial 0C to +70C | Different suffix - confirm grade | Commercial 0C to +70C |
| Lead-Free / RoHS | Lead-containing (per 'G' suffix variant) | Lead-containing | Lead-containing | Lead-containing | Lead-free / RoHS | Lead-free / RoHS |
| Packaging Format | Tube (standard) | Tube | Tape and Reel | Tape and Reel | Tube | Tube |
主な差別化要因
- On-chip buried-zener reference eliminates external precision reference （vs Discrete precision reference design)
- Internal track/hold and clock simplify external circuit design （vs Discrete SAR ADC + external SHA + external clock)
- Single +5 V supply operation simplifies power tree （vs Older ADCs requiring ±15 V and +5 V supplies)
設計ノート
Decouple V+ (pin 1) and VLOGIC (pin 13) with 0.1 uF ceramic capacitors placed within 5 mm of the supply pins, plus a 10 uF bulk capacitor near the chip. The buried-zener reference draws transient current during conversion; insufficient decoupling will cause reference sag and degrade linearity. Use separate analog and digital ground planes connected at a single point near the MAX172ACWG AGND pin to avoid digital switching noise coupling into the analog reference.
Route analog input traces away from the parallel digital output bus (DB1-DB11) and from switching nodes on adjacent circuitry. Add a ground guard trace around the analog input pin (pin 2) tied to AGND. The MAX172 datasheet specifies that input-charge kickback from the internal track/hold is approximately 20 pC per conversion; a low-impedance op-amp buffer (such as the MAX149) at the input will absorb this kickback and minimize conversion error. For multi-channel systems, place a 1 nF capacitor at the AIN pin to limit charge-injection effects from an upstream analog mux.
Do not exceed the absolute maximum ratings for the analog input (typically VREF plus 0.3 V) or apply signals before the supply rails are stable. The MAX172ACWG's MODE pin configuration determines input range (unipolar 0-VREF vs bipolar ±VREF); misconfiguring this pin results in offset errors and potentially clipped codes. The internal reference (REF pin) requires a minimum 4.7 uF external bypass capacitor for stability - smaller values cause oscillation and inaccurate conversions. For long-term reliability in industrial environments, add ESD protection diodes at the analog input pin.
コンプライアンス情報
The 'G' suffix indicates lead-containing finish per Maxim legacy part-number convention; the lead-free + variant is available for RoHS-compliant designs. RoHS and REACH compliance status not explicitly stated in the search snippets - confirm against the manufacturer's product page for new designs.
