PCA9507DP,118 - 2-Wire Bus Extender, 5V, 8-TSSOP | NXP
部品番号: PCA9507DP,118 ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $1.65 | $1.65 |
| 10 | $1.42 | $14.20 |
| 100 | $1.18 | $118.00 |
| 500 | $0.95 | $475.00 |
| 1,000 | $0.82 | $820.00 |
PCA9507DP,118 概要
What is an I²C bus extender? An I²C bus extender (also called a bus repeater or accelerator) is a type of interface IC that sits between two segments of a 2-wire serial bus and buffers both SCL (clock) and SDA (data) lines. Its purpose is twofold: to overcome capacitive loading limits that cap I²C bus length, and to translate voltage levels between dissimilar supply domains. The PCA9507 sits in the broader hierarchy of bus interface ICs (interface IC > bus extender > signal buffer/repeater), and is a specialized sibling of the I²C hub/switch family such as the PCA9543A.
Key features of the PCA9507DP,118 include: 1 channel of buffered SDA + SCL; support for Standard-mode (100 kHz), Fast-mode (400 kHz), and 3.4 MHz Fast-mode Plus overshoot tolerant operation on the upstream port; 2.7 V to 5.5 V supply range; 218 ns typical propagation delay; and integrated rise-time accelerators that allow designers to drop the bus pull-up resistors while still meeting rise-time budgets on long cables. It also provides hot-swap insertion tolerance so that cards can be plugged into a live backplane without corrupting the bus.
The internal architecture uses two N-channel MOSFET pass gates with charge-pump enhancement, plus direction-sensing comparators that automatically configure the channel as upstream or downstream. The upstream (master-side) port tolerates 3.3 V to 5 V, while the downstream port can operate down to 2.7 V, enabling typical 3.3 V-to-5 V HDMI DDC level shifting. The TSSOP-8 footprint makes the part suitable for compact HDMI connector breakouts, display modules, and embedded backplanes.
Typical applications include HDMI/DVI Display Data Channel (DDC) level shifters, I²C-bus extension over long cables (up to 18 m) in industrial control panels, SMBus fan and chassis management links, and any board-to-board 2-wire link that must bridge a voltage-level or capacitive-load gap. Because the device preserves arbitration and clock-stretching behavior, it is safe to insert in the middle of an existing multi-master bus.
When designing with the PCA9507, remember that the part is a pure bus extender with no pull-ups on either side. Both upstream and downstream segments still require external pull-up resistors sized to the segment capacitance, and the device's quiescent current (typically a few hundred microamps) must be included in the system power budget. For long cables, place the PCA9507 near the connector to keep the high-impedance stub short.
This page synthesizes distributor pricing, same-brand and cross-brand drop-in alternatives, and practical design notes for HDMI DDC and long-cable I²C applications - context not collected in the manufacturer datasheet alone.
ドロップイン代替品: PCA9507DP,118 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
クイック比較ツール — 並列比較する代替部品を選択:
PCA9507D
✅ ドロップイン📋 参考代替品（カタログ未掲載）
PCA9507DP
✅ ドロップイン📋 参考代替品（カタログ未掲載）
PCA9517DP,118
✅ ドロップイン📋 参考代替品（カタログ未掲載）
TCA9507
📋 参考代替品（カタログ未掲載）
PCA9507DP,118 仕様
| 機能 | Buffer, Accelerator (2-wire bus extender / repeater) |
| Number of Channels | 1 (SDA + SCL pair) |
| Bus Protocol | I²C, SMBus, DDC (HDMI) |
| 最大クロック周波数 | 400 kHz (Fast-mode) |
| Supply Voltage (VCC) | 2.7 V to 5.5 V |
| Voltage Translation | 3.3 V to 5 V level shift (bidirectional) |
| Propagation Delay | 218 ns (typical) |
| Bus Extension Capability | Up to 18 m |
| 動作温度 | -40 °C to +85 °C |
| パッケージ | 8-TSSOP (SOT505-1, DP suffix) |
| 実装タイプ | Surface Mount |
| Input Type | 2-wire (SCL, SDA) |
| 出力タイプ | 2-wire open-drain (SCL, SDA) |
| RoHS ステータス | Compliant |
| Lead-Free | Yes |
PCA9507DP,118 ピン構成
| ピン 1 | VCC1 — Upstream supply voltage (3.3 V to 5 V) |
| ピン 2 | SCL1 — Upstream serial clock line |
| ピン 3 | SDA1 — Upstream serial data line |
| ピン 4 | GND — Ground |
| ピン 5 | SDA2 — Downstream serial data line |
| ピン 6 | SCL2 — Downstream serial clock line |
| ピン 7 | EN — Enable input (active high) |
| ピン 8 | VCC2 — Downstream supply voltage (2.7 V to 5.5 V) |
主な用途
PCA9507DP,118 の用途: 7 件s: HDMI / DVI Display Data Channel (DDC) Level Shifter, Long-Cable I²C-Bus Extension (Industrial Panels), SMBus Chassis Management (Servers, Baseboards), Board-to-Board I²C Link with Mixed Voltages, I²C Fan Control and Monitor Links, Embedded Display Interface (MIPI DSI Bridge Boards), Test and Measurement Backplane Tap-Off.
HDMI / DVI Display Data Channel (DDC) Level Shifter
The PCA9507DP,118 sits between a 3.3 V graphics controller and the 5 V HDMI sink, providing bidirectional level translation on the DDC pair (SDA, SCL). Its 3.3 V to 5 V translation matches the HDMI specification exactly, and its rise-time accelerators compensate for the 5 V pull-up resistors on the sink side so the 100 kHz DDC bus meets rise-time budgets. Unlike discrete MOSFET level shifters, the PCA9507 retains arbitration behavior so multi-master scenarios remain safe, and the 8-TSSOP package fits behind a standard HDMI connector footprint on graphics cards, TV mainboards, and docking stations.
おすすめ
Long-Cable I²C-Bus Extension (Industrial Panels)
The PCA9507DP,118 extends the usable length of an I²C or SMBus link up to 18 meters, enabling sensor and HMI cabling across industrial control panels and machine chassis. Its integrated rise-time accelerators let designers use moderate-value pull-up resistors on long cables without violating the I²C rise-time spec. The bidirectional buffering prevents cable capacitance from loading the master controller, and the 2.7 V to 5.5 V supply matches typical 3.3 V and 5 V industrial rails. Use the PCA9507 near the cable connector to keep stubs short and avoid reflections.
おすすめ
SMBus Chassis Management (Servers, Baseboards)
In server and baseboard designs, the PCA9507DP,118 isolates SMBus segments between the BMC and peripheral cards, allowing hot-swap insertion of management devices without corrupting the bus. The device's hot-swap tolerance is a critical feature for live-backplane scenarios, where a card may be plugged in mid-transaction. Its 400 kHz Fast-mode capability covers typical IPMI SMBus traffic, and the 8-TSSOP footprint fits the dense layout of server management cards. Per the NXP datasheet, the part preserves clock stretching, which IPMI sensors rely on for slow reads.
おすすめ
Board-to-Board I²C Link with Mixed Voltages
The PCA9507DP,118 connects two PCBs that operate at different I²C bus voltages, such as a 3.3 V sensor board talking to a 5 V controller board over a backplane header. Its level-shift function is bidirectional and automatic, requiring no direction pin, which simplifies firmware. The 218 ns propagation delay is negligible compared to typical I²C bus periods at 100 kHz (10 µs) and 400 kHz (2.5 µs), so timing budgets are preserved. Designers commonly place the PCA9507 near the board-to-board connector to minimize stub length and EMI pickup.
おすすめ
I²C Fan Control and Monitor Links
The PCA9507DP,118 isolates a system's main I²C bus from noisy fan controllers, where switching noise from fan drivers can couple into the bus and disrupt communication. By buffering SDA and SCL, the part prevents fan-side transients from reaching the master, and its rise-time accelerators compensate for the additional capacitance of long fan cables. The 400 kHz rating covers modern PWM fan control buses, while the 8-TSSOP package fits the constrained PCB area around fan headers on ATX, microATX, and embedded SBC designs.
おすすめ
Embedded Display Interface (MIPI DSI Bridge Boards)
The PCA9507DP,118 provides DDC level shifting on bridge boards that adapt MIPI DSI or LVDS displays with HDMI-style DDC interfaces. Its bidirectional buffering supports the touchscreen and backlight-control I²C channels that often share the DDC pair. The 8-TSSOP footprint and minimal external component count make it easy to retrofit onto existing bridge boards without major layout rework. Designers appreciate the part's ability to hot-swap displays into a live system without locking up the bus.
おすすめ
Test and Measurement Backplane Tap-Off
In test equipment and rack instrumentation, the PCA9507DP,118 isolates the I²C control bus of a removable instrument module from the backplane, preventing backplane faults from propagating into the instrument. Its bidirectional buffering also allows the backplane master to communicate with a module that is hot-inserted with its own I²C devices powered up, supporting live module replacement. The 2.7 V to 5.5 V supply range covers both legacy 5 V instrumentation and modern 3.3 V logic, and the 8-TSSOP package is small enough to fit inside a standard instrument card cage slot.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: PCA9507DP,118 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | PCA9507D | PCA9507DP | PCA9517DP,118 | TCA9507 |
|---|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | Texas Instruments |
| Package | 8-TSSOP (DP, SOT505-1) | 8-TSSOP (DP) - same | 8-TSSOP (DP) - same | 8-TSSOP (DP) - same | 8-TSSOP (DGK) - similar |
| Function | Bus extender + level shift | Bus extender + level shift | Bus extender + level shift | Bus buffer/repeater (no level shift) | Bus extender + level shift |
| Number of Channels | 1 (SDA + SCL) | 1 | 1 | 1 | 1 |
| Maximum Clock Frequency | 400 kHz | 400 kHz | 400 kHz | 400 kHz | 400 kHz |
| Supply Voltage Range | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V |
| Voltage Translation | 3.3 V to 5 V bidirectional | 3.3 V to 5 V | 3.3 V to 5 V | None (same rail both sides) | 3.3 V to 5 V |
主な差別化要因
- Integrated 3.3 V to 5 V bidirectional level shift in one IC （vs PCA9517DP,118)
- Rise-time accelerators for long-cable I²C extension up to 18 m （vs Discrete MOSFET level shifter)
- Hot-swap tolerant for live backplane insertion （vs TCA9507 (TI))
設計ノート
Place the PCA9507DP,118 as close as possible to the connector that drives the long cable or different-voltage segment. Keep the trace stub between the part and the connector under 25 mm to minimize reflections on Fast-mode (400 kHz) edges. Use a solid ground plane under the TSSOP-8 package and route SDA1/SCL1 (upstream) and SDA2/SCL2 (downstream) as differential pairs if possible to maintain signal integrity across the level-shift boundary.
Both VCC1 (pin 1) and VCC2 (pin 8) require local decoupling - place a 100 nF ceramic cap on each supply pin within 3 mm, plus a 10 µF bulk cap on the higher-current rail. The PCA9507 has a quiescent current of a few hundred microamps per side, but transients during bus arbitration can momentarily draw several milliamps. Estimated: a 100 nF + 10 µF combination keeps ripple under 50 mVpp during a worst-case 400 kHz burst.
Do not assume the PCA9507 includes internal pull-up resistors - both upstream and downstream segments require external pull-ups sized to local bus capacitance. For HDMI DDC sinks, the 5 V pull-up on the sink side is typically 47 kΩ; do not add a second pull-up on the source side, as the parallel combination can overdrive the rise-time accelerators. Also, do not connect VCC1 and VCC2 to the same rail if you need level translation - tie VCC1 to the 3.3 V master rail and VCC2 to the 5 V (or 2.7 V minimum) downstream rail.
コンプライアンス情報
RoHS and REACH compliant per NXP product page. Not AEC-Q100 qualified (consumer/industrial grade, -40 °C to +85 °C). Lead-free reflow compatible.
