PCA9538PW/Q900 - 8-bit I2C GPIO Expander 400kHz | NXP
部品番号: PCA9538PW/Q900 ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $1.9 | $1.90 |
| 10 | $1.72 | $17.20 |
| 100 | $1.58 | $158.00 |
| 500 | $1.42 | $710.00 |
| 1,000 | $1.26 | $1,260.00 |
PCA9538PW/Q900 概要
An I/O expander (also called a GPIO expander or parallel input/output port) is a peripheral IC that adds general-purpose digital inputs and outputs to a host controller through a serial bus such as I2C or SMBus. Within the power-management and interface hierarchy, it sits alongside RTCs, supervisors, and port controllers as a low-cost solution when a microcontroller, chipset, or FPGA runs out of GPIO pins but retains an unused two-wire bus. NXP's PCA9538 belongs to the widely used PCF/PCA I2C port-expander family.
Key features include 8 quasi-bidirectional, 5 V tolerant I/O pins, an active-LOW open-drain interrupt output that flags any input-state change, and an active-LOW RESET input that restores the power-up default register set without a full power cycle. A polarity-inversion register lets software invert the read value of each I/O without external inverter logic. Three hardware address pins (A0-A2) allow up to eight PCA9538 devices on one 400 kHz I2C bus, expanding to 64 GPIOs.
Technically, the device is a CMOS slave with eight internal registers: input port, output port, polarity inversion, and configuration (direction) registers, mirrored into two banks. Writes and reads are simple two-byte transactions of command byte plus data byte, so integration requires no firmware libraries beyond a standard I2C master driver. Low standby current suits battery-powered and always-on designs.
Typical applications include ACPI power-switch control in servers and notebooks, push-button and switch monitoring, LED and relay control, sensor-board I/O fan-out, and backplane status-line aggregation in automotive gateways.
Design consideration: on the Q900 variant the supply range is 3.0 V to 5.5 V (versus 2.3 V to 5.5 V for the standard PCA9538PW), so verify rail tolerance before substituting between variants; keep the RESET pin biased high via a pull-up to avoid random resets.
This page synthesizes distributor pricing, drop-in alternatives, pinout detail, and practical design notes not found in the manufacturer datasheet alone.
ドロップイン代替品: PCA9538PW/Q900 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
クイック比較ツール — 並列比較する代替部品を選択:
PCA9538PW,118
✅ ドロップイン📋 参考代替品（カタログ未掲載）
PCA9538PW
✅ ドロップイン✓ 在庫あり
価格はお問い合わせください
データシートを見る →TCA9538PW
✅ ドロップイン📋 参考代替品（カタログ未掲載）
PCA9538PW/Q900 仕様
| 機能 | 8-bit I2C-bus/SMBus GPIO expander with interrupt and reset |
| Number of I/O Pins | 8 |
| インターフェース | I2C, SMBus |
| Maximum Bus Frequency | 400 kHz |
| Supply Voltage Range | 3.0 V to 5.5 V (Q900 variant) |
| I/O Voltage Tolerance | 5 V tolerant I/Os |
| Hardware Address Pins | 3 (A0, A1, A2) - up to 8 devices per bus |
| Interrupt Output | Active-LOW, open-drain |
| Reset Input | Active-LOW RESET |
| Polarity Inversion Register | Yes, per-bit |
| Configuration Register | Yes, per-bit input/output direction |
| Technology | CMOS, low power |
| パッケージ | TSSOP-16 (PW), SOT360-1 |
| 実装タイプ | Surface Mount |
| Terminal Form | Gull wing, 16 terminals |
PCA9538PW/Q900 ピン構成
| ピン 1 | A0 — Hardware address input 0 |
| ピン 2 | A1 — Hardware address input 1 |
| ピン 3 | A2 — Hardware address input 2 |
| ピン 4 | IO0 — 8-bit quasi-bidirectional I/O 0 (5 V tolerant) |
| ピン 5 | IO1 — 8-bit quasi-bidirectional I/O 1 (5 V tolerant) |
| ピン 6 | IO2 — 8-bit quasi-bidirectional I/O 2 (5 V tolerant) |
| ピン 7 | IO3 — 8-bit quasi-bidirectional I/O 3 (5 V tolerant) |
| ピン 8 | VSS — Ground (supply) |
| ピン 9 | IO4 — 8-bit quasi-bidirectional I/O 4 (5 V tolerant) |
| ピン 10 | IO5 — 8-bit quasi-bidirectional I/O 5 (5 V tolerant) |
| ピン 11 | IO6 — 8-bit quasi-bidirectional I/O 6 (5 V tolerant) |
| ピン 12 | IO7 — 8-bit quasi-bidirectional I/O 7 (5 V tolerant) |
| ピン 13 | INT — Interrupt output, active LOW, open-drain |
| ピン 14 | RESET — Active LOW reset input; restores power-up default registers |
| ピン 15 | SCL — I2C-bus/SMBus serial clock input |
| ピン 16 | VDD — Supply voltage, 3.0 V to 5.5 V (Q900 variant) |
主な用途
PCA9538PW/Q900 の用途: 6 件s: ACPI Power Switch Control, Push-Button and Switch Monitoring, Automotive Body Electronics I/O Expansion, LED and Relay Control, Sensor Board and FPGA I/O Fan-Out, Backplane and Server Status Aggregation.
ACPI Power Switch Control
The PCA9538PW/Q900 was explicitly developed for ACPI power-switch control in servers, notebooks, and industrial PCs, where a baseboard controller must gate multiple power rails that it cannot drive directly from scarce GPIO. The eight 5 V tolerant I/Os drive MOSFET gate or load-switch enable lines from a 3.3 V or 5 V chipset bus at 400 kHz, while the active-LOW INT output flags fault or switch-state changes to the embedded controller without polling. The active-LOW RESET restores known rail-off defaults after a watchdog event, and the Q900 qualified flow suits server qualification programs. Because register writes are two-byte I2C transactions, rail-sequencing firmware is trivial to implement and audit.
おすすめ
Push-Button and Switch Monitoring
Human-interface panels concentrate mechanical switches, toggle levers, and push-buttons that must be read by a central controller without running dozens of discrete wires. The PCA9538PW/Q900 maps eight switch inputs onto one I2C bus: inputs are debounced in software via the input-port register, and the open-drain active-LOW INT output interrupts the host the moment any input state changes, eliminating continuous polling. The per-bit polarity-inversion register normalizes active-low switch wiring in silicon, simplifying firmware. Three address pins let a dashboard stack up to eight expanders (64 switches) on one 400 kHz bus. Its low CMOS standby current also suits battery-powered remote keypads and access-control terminals.
おすすめ
Automotive Body Electronics I/O Expansion
Body-control modules, gateways, and lighting controllers constantly run out of GPIO while adding comfort and diagnostic features. The Q900 qualified flow of the PCA9538PW/Q900, with its 3.0 V to 5.5 V supply range matching 5 V automotive rails, lets a single SCL/SDA pair from the MCU expand eight buffered I/Os for lamp enable, door-switch sense, and relay drive pre-stage signals. The 5 V tolerant pins accept raw switch inputs even when the expander runs at 3.3 V, and the RESET pin lets a supervisor force outputs to safe defaults at crank. Two-byte register access keeps CAN-to-I/O latency deterministic in a 400 kHz bus.
おすすめ
LED and Relay Control
Status LEDs, indicator clusters, and small signal relays are classic GPIO-expander loads. The PCA9538PW/Q900's configuration register sets each pin as push-pull output, and the output-port register groups eight enables into one I2C write, ideal for synchronized bank switching of indicator LEDs or driving relay-driver transistor stages. Per-bit polarity inversion maps active-low driver logic without external inverters. Sink and source capability per pin is per the NXP datasheet [see datasheet absolute maximum ratings for per-pin current limits], so use transistor buffers for loads beyond LED current. Three address pins allow one controller to manage eight expander banks (64 loads) at 400 kHz with deterministic timing.
おすすめ
Sensor Board and FPGA I/O Fan-Out
FPGA and ASIC-based boards routinely exhaust user I/O before exhausting board space, and the PCA9538PW/Q900 provides the low-cost fix: eight extra bidirectional pins behind a two-wire bus. The expander handles slow housekeeping signals - reset lines, mode straps, board-ID straps, and monitor switches - so FPGA banks stay dedicated to high-speed functions. The RESET input ties to a supervisor or CPLD so a power glitch returns all strap outputs to safe defaults. 5 V tolerant pins bridge 5 V legacy sensors to a 3.3 V bus, and the INT output aggregates sensor alarms onto one host line. Placement anywhere on the 400 kHz bus simplifies layout across stacked boards.
おすすめ
Backplane and Server Status Aggregation
Chassis and backplane management controllers must aggregate dozens of presence, fault, and hot-swap status lines from drives, PSU modules, and fan trays. Cascading PCA9538PW/Q900 expanders - up to eight per 400 kHz bus via the A0-A2 pins - gives 64 status inputs per two-wire segment, with each device's open-drain INT wire-ORed to alert the BMC instantly. The polarity-inversion register normalizes mixed active-low fault wiring from different module vendors, and the RESET pin clears expander state during chassis power sequencing. Industrial temperature grade and the Q900 flow support enterprise hardware qualification programs, while SMBus compatibility keeps the segment standard for server management buses.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: PCA9538PW/Q900 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | PCA9538PW,118 | PCA9538PW (TI) | TCA9538PW | PCA9538D,118 |
|---|---|---|---|---|---|
| Package | TSSOP-16 (PW) | TSSOP-16 (PW) - same | TSSOP-16 (PW) - same | TSSOP-16 (PW) - same | SO16 - different body |
| Brand | NXP Semiconductors | NXP Semiconductors | Texas Instruments | Texas Instruments | NXP Semiconductors |
| GPIO Count | 8 | 8 | 8 | 8 | 8 |
| Interrupt Output | Yes, active-LOW open-drain | Yes, active-LOW | Yes | Yes, active-LOW | Yes, active-LOW |
| Reset Input | Yes, active-LOW RESET | Yes, active-LOW | Yes | Yes | Yes, active-LOW |
| Hardware Addresses | 8 (A0-A2) | 8 (A0-A2) | 8 (A0-A2) | 8 (A0-A2) | 8 (A0-A2) |
主な差別化要因
- Q900 qualified manufacturing flow （vs PCA9538PW,118)
- Lower minimum supply voltage （vs TCA9538PW)
- Interrupt + reset combination with polarity inversion （vs PCA9538D,118)
設計ノート
Pull SCL and SDA to the bus rail with 2.2 kOhm to 4.7 kOhm resistors for 400 kHz operation (higher values are acceptable at 100 kHz with low bus capacitance). The open-drain INT output also needs a pull-up, sized per the host interrupt input. Pull RESET high to VDD through a 10 kOhm resistor if unused - leaving it floating risks spurious register resets from board leakage. Tie unused address pins A0-A2 solidly to VDD or VSS; floating address pins cause intermittent bus conflicts when multiple expanders share a segment.
Verify the supply rail against the Q900 restriction: this variant is specified 3.0 V to 5.5 V, while the standard PCA9538PW works down to 2.3 V. A design reusing a 2.5 V rail would fall outside Q900 guarantees even though the footprint and firmware are identical - select PCA9538PW,118 or TCA9538PW instead. Also confirm quiescent and per-pin current limits against the NXP datasheet absolute maximum table before driving loads directly; use transistor buffers for relays or lamp loads exceeding LED-level currents.
Estimated: the CMOS expander draws only microamp-to-milliamp quiescent current (see the NXP datasheet supply-current table for exact limits), so power budget impact is negligible; the practical thermal concern is per-pin sink current when driving multiple LEDs simultaneously - sum the per-pin currents and confirm the package total current rating before populating all eight outputs with loads. Decouple VDD with 100 nF ceramic placed within 5 mm of pin 16 to pin 8, plus optional 10 uF bulk if the bus segment shares a noisy rail.
At 400 kHz, keep SCL/SDA stubs short on backplanes and use a single distributed RC value calculated from total bus capacitance rather than one resistor per card slot. The RESET and INT lines are slow, glitch-tolerant signals and can run long, but route INT away from motor or relay driver lines - the open-drain structure recovers cleanly from coupling, yet nuisance interrupts load firmware. For hot-insertable cards, ensure the expander VDD ramps before the bus lines are driven, or use an SMBus solution with live-insertion protection.
コンプライアンス情報
Ordering suffix ,118 denotes NXP standard RoHS/lead-free packaging per NXP ordering convention. The /Q900 suffix denotes NXP qualified automotive-support flow, not an AEC-Q100 certification level; verify exact qualification status with NXP. REACH, halogen-free, and conflict-minerals status not stated in provided data.
