PIC18F16Q40-I/P - 64KB Flash 8-bit MCU 64MHz 20-PDIP | Microchip
部品番号: PIC18F16Q40-I/P ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $2.45 | $2.45 |
| 10 | $2.18 | $21.80 |
| 100 | $1.92 | $192.00 |
| 500 | $1.71 | $855.00 |
| 1,000 | $1.55 | $1,550.00 |
PIC18F16Q40-I/P 概要
An 8-bit PIC microcontroller (MCU) is a Harvard-architecture RISC processor that combines a CPU, Flash program memory, RAM, EEPROM, and rich peripherals (ADC, PWM, UART, SPI, I2C) on a single die. Within the broader taxonomy, a PIC18 device sits above base-line PIC10/12/14 MCUs and below the 16-bit dsPIC/PIC24 family, occupying the high-performance segment of Microchip's 8-bit portfolio for real-time control.
Key features include 64KB Flash (64K x 8), 4KB SRAM, 512 bytes EEPROM, a 12-bit ADC with Computation (ADCC) supporting Capacitive Voltage Divider (CVD) for advanced touch sensing, two 8-bit DAC modules, four 16-bit PWMs with edge-aligned and center-aligned modes, a 4-channel DMA controller, and Peripheral Pin Select (PPS) for flexible I/O mapping. Core-independent peripherals include Configurable Logic Cells (CLC), Complementary Waveform Generator (CWG), and Numerically Controlled Oscillator (NCO).
The PIC18-Q40 architecture employs an 8-bit RISC core with a 16-bit instruction word, 31-level hardware stack, and a wide peripheral set designed for deterministic control loops. The 12-bit ADCC supports averaging, oversampling, threshold comparison, and hardware CVD, offloading signal-conditioning tasks from the CPU and reducing firmware complexity.
Typical applications include capacitive touch user interfaces, LED lighting and color-mixing control, sensor signal conditioning with on-chip DSP, motor-control pre-driver stages, and compact IoT edge nodes requiring deterministic timing. The 20-PDIP through-hole package simplifies prototyping and breadboarding for hobbyist, educational, and lab-grade designs.
When designing with this device, choose the 20-PDIP package variant (I/P) for through-hole prototyping or the I/SO or I/SS packages for SMD production. PPS must be carefully mapped because each digital function can be routed to multiple physical pins; consult the device family datasheet for the full PPS remap table.
This page consolidates distributor pricing, pin-compatible alternatives, and design notes beyond what the manufacturer datasheet provides, helping engineers select and qualify the PIC18F16Q40-I/P for real-time control applications.
ドロップイン代替品: PIC18F16Q40-I/P — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: PIC18F16Q40-I/P （同一形状・フットプリント） — 相違点: Package, PWM, Program Memory (Flash), ADC, Mounting Type.
クイック比較ツール — 並列比較する代替部品を選択:
PIC18F15Q41-I/P
✅ ドロップイン✓ 在庫あり
$1.35 / 個
データシートを見る →PIC18F14Q40-I/P
✅ ドロップイン✓ 在庫あり
$0.89 / 個
データシートを見る →PIC18F06Q40-I/P
✅ ドロップイン📋 参考代替品（カタログ未掲載）
PIC18F13K22-I/P
✅ ドロップイン✓ 在庫あり
$1.21 / 個
データシートを見る →PIC18F16Q40-I/P 最大定格＆電気的特性
| Core Architecture | PIC18 8-bit RISC |
| Program Memory (Flash) | 64 KB (64K x 8) |
| Data Memory (SRAM) | 4 KB |
| EEPROM | 512 bytes |
| Maximum CPU Speed | 64 MHz |
| Operating Voltage Range | 2.5V / 3.3V / 5V |
| ADC | 12-bit with Computation (ADCC), CVD support |
| DAC | 2 x 8-bit |
| PWM | 16-bit, multiple channels |
| DMA Channels | 4 |
| Configurable Logic Cells (CLC) | Yes |
| Peripheral Pin Select (PPS) | Yes |
| Communication Interfaces | UART, SPI, I2C |
| パッケージ | 20-pin PDIP (DIP-20) |
| 動作温度範囲 | -40C to +85C (Industrial) |
| 実装タイプ | Through-Hole |
| RoHS ステータス | Compliant |
| Lead-Free | Yes |
PIC18F16Q40-I/P ピン構成
| ピン 1 | RA0/ANA0 — Analog input 0 / digital I/O |
| ピン 2 | RA1/ANA1 — Analog input 1 / digital I/O |
| ピン 3 | RA2/ANA2 — Analog input 2 / digital I/O |
| ピン 4 | RA3/MCLR — Master Clear (reset) input / digital I/O |
| ピン 5 | RA4/ANA3 — Analog input 3 / digital I/O |
| ピン 6 | RA5/ANA4 — Analog input 4 / digital I/O |
| ピン 7 | RA6/OSC2 — Digital I/O / oscillator output |
| ピン 8 | RA7/OSC1 — Digital I/O / oscillator input |
| ピン 9 | VSS — Ground reference |
| ピン 10 | VDD — Positive supply voltage |
| ピン 11 | RB4/ANB4 — Analog input / digital I/O |
| ピン 12 | RB5/ANB5 — Analog input / digital I/O |
| ピン 13 | RB6/ICSPCLK — Digital I/O / ICSP clock |
| ピン 14 | RB7/ICSPDAT — Digital I/O / ICSP data |
| ピン 15 | RC0 — Digital I/O |
| ピン 16 | RC1 — Digital I/O |
| ピン 17 | RC2 — Digital I/O |
| ピン 18 | RC3 — Digital I/O |
| ピン 19 | RC4 — Digital I/O |
| ピン 20 | RC5 — Digital I/O |
主な用途
PIC18F16Q40-I/P の用途: 6 件s: Capacitive Touch User Interface, LED Lighting and Color Mixing Control, Sensor Signal Conditioning with On-Chip DSP, Motor Control Pre-Driver Stage, IoT Edge Sensor Nodes, Prototyping and Educational Platforms.
Capacitive Touch User Interface
The PIC18F16Q40-I/P is ideally suited for capacitive touch user-interface panels because its 12-bit ADC with Computation (ADCC) performs hardware Capacitive Voltage Divider (CVD) measurement autonomously. The ADCC also handles averaging, filtering, oversampling, and threshold comparison in hardware, offloading signal conditioning from the CPU and reducing firmware complexity for buttons, sliders, and proximity sensors. With 64 MHz CPU performance and 4 KB SRAM, the device can drive multiple touch electrodes while concurrently handling LED feedback, communication, and system housekeeping. The 20-pin PDIP package simplifies breadboarding during UI prototype development, while production variants migrate easily to SOIC-20 or SSOP-20 footprints.
おすすめ
LED Lighting and Color Mixing Control
The PIC18F16Q40-I/P provides 16-bit PWM resolution with multiple channels, ideal for LED dimming, color mixing, and high-CRI tunable-white lighting fixtures. The two 8-bit DACs can drive reference voltages or analog bias networks while the PWMs switch the LED strings with sub-percent duty-cycle accuracy, eliminating visible flicker. PPS enables flexible pin routing of PWM outputs to physical pads, simplifying PCB layout for multi-channel light engines. The 64 MHz CPU supports smooth logarithmic dimming curves and CIE-1931 color transitions without taxing system throughput.
おすすめ
Sensor Signal Conditioning with On-Chip DSP
The PIC18F16Q40-I/P combines the 12-bit ADCC with the 4-channel DMA controller and Configurable Logic Cells (CLC) to perform sensor signal conditioning directly on-chip. Sensor data can be DMA-transferred from the ADC into memory without CPU intervention, while CLC blocks implement custom logic gating, event timing, or pulse-train decoding. The integrated NCO (Numerically Controlled Oscillator) generates precise frequency references for sensor excitation, making the device well suited for automotive sensors, industrial transducers, and instrumentation front-ends. The 4 KB SRAM accommodates waveform buffering and FIR/IIR filter histories.
おすすめ
Motor Control Pre-Driver Stage
The PIC18F16Q40-I/P can serve as a low-cost pre-driver and commutation controller for brushed DC, stepper, or small brushless DC motors, leveraging its 16-bit PWMs and CWG (Complementary Waveform Generator). Center-aligned PWM mode with programmable dead-time generation protects half-bridge power stages from shoot-through, while the ADCC samples back-EMF or current-sense signals for closed-loop control. The 20-pin PDIP package supports easy integration with discrete gate-driver networks for prototyping and lab development, with a smooth transition to SO/SS SMD variants for production.
おすすめ
IoT Edge Sensor Nodes
The PIC18F16Q40-I/P's 64 KB Flash, 4 KB SRAM, and rich peripherals enable compact IoT edge nodes that aggregate sensor data, perform local processing, and forward results over UART/SPI/I2C. The 2.5V-5V operating range supports both 3.3V digital communication rails and analog sensors, eliminating external level shifters. The Configurable Logic Cells can wake the CPU from sleep on specific event patterns, conserving power in battery-powered edge devices. PPS allows the same silicon to serve multiple product SKUs with different pin assignments, simplifying hardware variants.
おすすめ
Prototyping and Educational Platforms
The PIC18F16Q40-I/P with its 20-pin PDIP through-hole package is purpose-built for educational platforms, hobbyist projects, and breadboard-based prototyping. The wide 2.5V-5V supply tolerance allows direct connection to 5V Arduino-class shields, while PPS, ADCC, and CLC provide modern peripheral features that prepare students for industrial control design. The Microchip MPLAB X IDE and XC8 compiler fully support the PIC18F16Q40 family, with Curiosity Nano evaluation boards (EV70C97A) enabling quick out-of-the-box programming and debugging. The 64 KB Flash accommodates full application stacks including FreeRTOS or state-machine frameworks.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: PIC18F16Q40-I/P — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | PIC18F15Q41-I/P | PIC18F14Q40-I/P | PIC18F06Q40-I/P | PIC18F13K22-I/P |
|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 20-pin PDIP | 20-pin PDIP - same | 20-pin PDIP - same | 20-pin PDIP - same | 20-pin PDIP - same |
| Flash Memory | 64 KB | 32 KB (-50%) | 16 KB (-75%) | 16 KB (-75%) | 8 KB (-87.5%) |
| SRAM | 4 KB | 2 KB | 1 KB | 512 B | 256 B |
| Maximum CPU Speed | 64 MHz | 64 MHz | 64 MHz | 64 MHz | 64 MHz |
| ADC | 12-bit ADCC | 12-bit ADCC with touch hardware | 12-bit ADCC | 12-bit ADCC | 10-bit ADC |
| PWM Resolution | 16-bit | 16-bit | 16-bit | 16-bit | 10-bit PWM (CCP) |
| DMA | 4 channels | 4 channels | 4 channels | 4 channels | No DMA |
| Operating Temperature | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
主な差別化要因
- Largest Flash memory in 20-pin PIC18-Q40 family （vs PIC18F14Q40-I/P)
- Modern Q40 generation with ADCC and DMA （vs PIC18F13K22-I/P)
- Through-hole PDIP variant for prototyping （vs PIC18F16Q40-I/SO)
設計ノート
Estimated: at 64 MHz CPU clock and VDD=5V with full peripheral activity, the PIC18F16Q40-I/P typically draws 10-15 mA active current and drops to under 1 uA in Sleep mode with peripherals disabled. Add a 100 nF decoupling capacitor as close as possible to the VDD pin and a bulk 10 uF electrolytic on the supply rail to manage inrush during PLL lock and ADC conversions.
Keep analog and digital traces separated where possible on the 20-pin PDIP layout. Route the MCLR/VPP pin through a 10 kohm pull-up to VDD to ensure reliable reset, and place the ICSP connector footprint near pins 13/14 (RB6/RB7) so that in-circuit programming does not require header pin sharing. For breadboard prototypes, use a 20-pin DIP socket to allow device replacement.
PPS remapping on PIC18-Q40 devices is configured per-pin and must be unlocked before changes (PPSLOCK bit sequence). Failing to follow the unlock sequence is the most common source of 'dead' UART/SPI/I2C peripherals. Always refer to the family datasheet (Microchip document 40002216D) for the full pin-to-peripheral mapping table.
Route the crystal/oscillator traces (RA6/OSC2 and RA7/OSC1) short and symmetric with a ground guard ring to minimize EMI. If using the internal HFINTOSC instead, leave RA6/RA7 available for digital I/O through PPS, but ensure that no floating load is left on the oscillator pins - tie them to VDD or VSS through 10 kohm if unused.
コンプライアンス情報
RoHS and REACH compliant per Microchip product page. Industrial (-40C to +85C) operating range; automotive-grade variants are not in the standard -I/P product offering. Halogen-free status not explicitly disclosed in the verified web data.
