SI7155DP-T1-GE3 - 40V P-Channel TrenchFET MOSFET | Vishay
部品番号: SI7155DP-T1-GE3 ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $1.85 | $1.85 |
| 10 | $1.62 | $16.20 |
| 100 | $1.38 | $138.00 |
| 500 | $1.18 | $590.00 |
| 1,000 | $1.02 | $1,020.00 |
| 3,000 | $0.86 | $2,580.00 |
SI7155DP-T1-GE3 概要
Key specifications include a maximum drain-source voltage of -40 V, a gate threshold of -20 V VGS, continuous drain current of 31 A (TA) / 100 A (TC), and pulsed drain current of 100 A per the device datasheet. The part dissipates 6.25 W at TA and 104 W at TC, and carries the industry-leading TrenchFET Gen III RDS(on) ratings that make it competitive with much larger packages like DPAK.
A P-Channel MOSFET (PMOS) is a four-terminal field-effect transistor in which the channel conducts when the gate is pulled below the source potential. PMOS devices are commonly used as high-side switches because their source is tied to the load return and a gate voltage below ground can fully enhance the channel. Power MOSFETs sit within the broader hierarchy of discrete semiconductors -> transistors -> MOSFETs -> power MOSFETs -> TrenchFET family, and Vishay's PowerPAK SO-8 package is the recognized SMD alternative to through-hole DPAK footprints where PCB real estate and thermal performance must coexist.
The SI7155DP benefits from 100 % Rg (gate resistance) and UIS (avalanche / Unclamped Inductive Switching) tested reliability per Vishay's manufacturing flow. The PowerPAK SO-8 case provides a low thermal resistance path from the die to the PCB copper, which in many applications eliminates the need for an external heatsink while still delivering D2PAK-class current handling.
Typical applications for the SI7155DP-T1-GE3 include adapter and charger load switches, server and telecom power systems OR-ing and high-side switching, battery protection circuits in portable equipment, and high-power load management in industrial DC distribution.
When designing the gate drive, designers should pull VGS to approximately -10 V for full enhancement and keep gate-source voltage strictly within the absolute maximum of +/-20 V to avoid gate-oxide breakdown. Source-pin layout should route the high-current return first to minimize package parasitic inductance between the source bond wire and the main current path.
This page synthesizes Vishay distributor pricing tiers, drop-in PowerPAK SO-8 alternatives, and practical PCB layout notes that go beyond the raw datasheet information.
ドロップイン代替品: SI7155DP-T1-GE3 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
クイック比較ツール — 並列比較する代替部品を選択:
SI7157DP-T1-GE3
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
SI7155DP-T1-E3
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
SI7155DP-E3
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
SI7541ADP-T1-GE3
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
SIR158DP-T1-GE3
✅ ドロップイン📋 参考代替品（カタログ未掲載）
SI4435DY-T1-GE3
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
SI7155DP-T1-GE3 最大定格＆電気的特性
| Polarity / Channel Type | P-Channel |
| Drain-Source Voltage (VDS) | -40 V |
| Gate-Source Voltage (VGS) max | +/-20 V |
| Continuous Drain Current (ID) at TA=25C | 31 A |
| Continuous Drain Current (ID) at TC=25C | 100 A |
| Pulsed Drain Current (IDM) | 100 A |
| Power Dissipation (PD) at TA=25C | 6.25 W |
| Power Dissipation (PD) at TC=25C | 104 W |
| Technology | TrenchFET Gen III |
| パッケージ | PowerPAK SO-8 |
| 実装タイプ | Surface Mount |
| 動作温度範囲 | -55C to +150C |
| Reliability Tests | 100% Rg tested, 100% UIS (avalanche) tested |
| Datasheet Document | 75769 (Vishay product folder) |
| RoHS ステータス | Compliant |
SI7155DP-T1-GE3 ピン構成
| ピン 1 | Source (S) — P-channel source (connected to load/positive rail) |
| ピン 2 | Source (S) — P-channel source (internally tied to pin 1) |
| ピン 3 | Source (S) — P-channel source (internally tied to pin 1) |
| ピン 4 | Gate (G) — P-channel gate (drive below source to enhance) |
| ピン 5 | Drain (D) — P-channel drain (connected to the upstream supply) |
| ピン 6 | Drain (D) — P-channel drain (internally tied to pin 5) |
| ピン 7 | Drain (D) — P-channel drain (internally tied to pin 5) |
| ピン 8 | Drain (D) — P-channel drain (internally tied to pin 5) |
安全動作領域 (DC)
主な用途
SI7155DP-T1-GE3 の用途: 6 件s: Adapter / Charger Load Switch, Server / Telecom Power OR-ing, Battery Protection (High-Side Disconnect), Industrial High-Power Load Switch, Hot-Swap / In-Rush Current Limiter, USB Type-C Power Delivery (Source Switch).
Adapter / Charger Load Switch
The SI7155DP-T1-GE3 is engineered into USB-PD adapters and laptop chargers as the high-side P-channel load switch that disconnects the output when USB-C is in sink-only or unattached mode. Its 31 A continuous (TA) rating handles full 20 V/5 A (100 W) USB-PD output bursts without exceeding SOA, and the 40 V VDS gives adequate transient headroom for the 20 V rail plus inductive ringing. The PowerPAK SO-8 footprint drops into a standard SO-8 land pattern, saving PCB area vs DPAK. Trade-off vs N-channel alternatives: P-channel high-side drive is simpler than bootstrap N-channel circuits, but RDS(on) is higher per mm² of silicon.
おすすめ
Server / Telecom Power OR-ing
In 48 V telecom bus OR-ing and 12 V server redundant power designs, the SI7155DP-T1-GE3 acts as the high-side P-channel switch that isolates a failed supply from the live bus. Its 100 % UIS (avalanche) tested reliability per Vishay datasheet 75769 handles the inductive kick when the load suddenly disconnects, and the 40 V VDS rating with 31 A TA continuous rating covers typical 12 V/24 V rails. The PowerPAK SO-8 package offers DPAK-class thermal performance for sustained hot operation. Compared to a Schottky OR-ing diode, the MOSFET drop is much lower (reducing dissipation from watts to millivolts) but gate drive complexity rises because the source sits at the load.
おすすめ
Battery Protection (High-Side Disconnect)
For 3S/4S Li-ion battery packs in e-bikes, power tools, and portable medical equipment, the SI7155DP-T1-GE3 sits between the battery stack and the load as the high-side P-channel disconnect. The P-channel drive returns the source to the positive rail, allowing the BMS microcontroller to pull the gate to ground to enable the FET or to VCC+ to disable it; the 40 V VDS tolerates a fully charged 4S stack at 16.8 V plus inductive ringing. Continuous current of 31 A TA addresses 10 A continuous discharge paths, while the 100 A pulsed rating provides brief surge capability for motor inrush. Compare to dedicated battery-protection ICs: discrete SI7155DP is more flexible but lacks built-in cell balancing and protection algorithms.
おすすめ
Industrial High-Power Load Switch
In 24 V industrial automation cabinets, the SI7155DP-T1-GE3 serves as the high-side P-channel switch that turns individual PLC outputs, motor drivers, and solenoid banks on under software control. The 40 V VDS withstands the IEC 61131-2 transient envelope on 24 V industrial buses, and the 100 % Rg tested reliability ensures the gate oxide survives 20 V VGS over-voltage from cabling transients. PowerPAK SO-8's thermal performance supports 5 A continuous on modest copper pours where a standard SO-8 would thermally limit. Designers often parallel two SI7155DP-T1-GE3s for 10 A outputs in compact DIN-rail modules, exploiting P-channel matching to balance current.
おすすめ
Hot-Swap / In-Rush Current Limiter
In server backplane and telecom -48 V systems, the SI7155DP-T1-GE3 functions as the controller-side high-side P-channel switch that, together with a gate resistor, soft-starts bulk capacitors on plug-in cards. The 100 % UIS tested reliability per Vishay datasheet 75769 is critical here because the avalanche energy from an unplugged card with charged output caps can exceed several millijoules, and unlike many competitors this Vishay part is guaranteed to survive such UIS events. P-channel drive is naturally compatible with the negative-rail bias that most hot-swap controllers output for high-side switches. Compared to dedicated hot-swap ICs with built-in current sense, the discrete SI7155DP approach is cheaper but requires careful RC compensation to avoid start-up oscillation.
おすすめ
USB Type-C Power Delivery (Source Switch)
In USB-PD 3.1 source applications delivering 5 A, 9 V/12 V/15 V/20 V, the SI7155DP-T1-GE3 sits between the DC-DC converter and the Type-C VBUS pin as the high-side P-channel switch controlled by the PD controller's enable output. The 31 A continuous (TA) rating comfortably carries 100 W (20 V x 5 A) full-power delivery per the latest USB-PD specification, and the 40 V VDS rating provides margin above the highest 20 V PD contract. PowerPAK SO-8's footprint allows direct drop into the same land pattern as a Type-C source FET in space-constrained laptop dongles. Trade-off: a higher-current Si7157DP might be preferred for 28 V/36 V EPR mode USB-PD 3.1 cables where VDS margin shrinks.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: SI7155DP-T1-GE3 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | SI7157DP-T1-GE3 | SI7155DP-T1-E3 | SI7155DP-E3 | SI7541ADP-T1-GE3 | SIR158DP-T1-GE3 | SI4435DY-T1-GE3 |
|---|---|---|---|---|---|---|---|
| Brand | Vishay Intertechnology | Vishay Intertechnology | Vishay Intertechnology | Vishay Intertechnology | Vishay Intertechnology | Vishay Intertechnology | Vishay Intertechnology |
| Package | PowerPAK SO-8 | PowerPAK SO-8 - same | PowerPAK SO-8 - same | PowerPAK SO-8 - same | PowerPAK SO-8 - same | PowerPAK SO-8 - same | PowerPAK SO-8 - same |
| Polarity | P-Channel | P-Channel | P-Channel | P-Channel | P-Channel (dual) | N-Channel | P-Channel |
| Drain-Source Voltage (VDS) | -40 V | -60 V | -40 V | -40 V | -30 V | -30 V | -30 V |
| Continuous Drain Current at TA=25C | 31 A | 30 A (typical) | 31 A | 31 A | 16 A (per die, dual) | 60 A | 25 A (typical) |
| Gate-Source Voltage max (VGS) | +/-20 V | +/-20 V | +/-20 V | +/-20 V | +/-20 V | +/-20 V | +/-20 V |
| Technology | TrenchFET Gen III | TrenchFET Gen III | TrenchFET Gen III | TrenchFET Gen III | TrenchFET | TrenchFET Gen III | TrenchFET |
| RoHS / Halogen-Free | Compliant (GE3 = halogen-free) | Compliant (GE3) | Compliant (E3 = lead-free) | Compliant (E3 = lead-free) | Compliant (GE3) | Compliant (GE3) | Compliant (GE3) |
主な差別化要因
- Higher VDS rating (60 V vs 30 V alternatives) （vs SI4435DY-T1-GE3 / SIR158DP-T1-GE3)
- True single-P-channel in compact PowerPAK SO-8 （vs SI7541ADP-T1-GE3)
- 100% UIS (avalanche) tested reliability （vs SI7541ADP-T1-GE3)
設計ノート
Estimated: at TA=25C, the SI7155DP-T1-GE8 (same die in PowerPAK SO-8) is rated for 31 A continuous with 6.25 W dissipation. Real PCB mounting typically reduces this to roughly half (about 15 A) without a substantial copper pour. Designers targeting 10 A or more continuous should size the PowerPAK copper pad to at least 1 square inch (645 mm²) top-side with thermal vias to inner ground planes, per Vishay document 75769 thermal layout guidelines. The PowerPAK SO-8 case has an exposed bottom pad that MUST be soldered to the PCB copper for both electrical grounding (Source) and thermal conduction.
Place the SI7155DP-T1-GE3 such that the high-current Source pins (pins 1-3) connect to the load with the shortest possible trace, and the Drain pins (5-8) connect to the upstream supply. The PowerPAK SO-8 internal lead frame ties pins 1-3 in parallel (Source) and pins 5-8 in parallel (Drain), so all four pins on each side MUST be soldered to spread current and share thermal conduction. Use 2 oz copper (70 um) on the outer layers where the part sits, and stitch thermal vias (0.3 mm, 0.5 mm pitch) under the exposed pad to inner ground planes. Avoid running noisy analog signals directly under the PowerPAK footprint to minimize coupling into the source pin.
Do NOT drive the SI7155DP-T1-GE3 gate above the absolute maximum VGS of +/-20 V — exceeding this will permanently damage the thin gate oxide. For P-channel high-side switching, ensure the gate driver can pull the gate fully above source (to disable) and below source by at least 10 V (to fully enhance). Common pitfall: designers forget that the gate-source voltage reference is the SOURCE pin, not ground, so a 'logic-level' 3.3 V drive referenced to ground will NOT turn off a P-channel MOSFET whose source sits at +12 V. Add a pull-up resistor on the gate to the source rail so the part defaults to OFF during power-up when the gate driver is in high impedance.
For hot-swap and inrush-limiting applications, add a small gate resistor (10-100 ohm) in series with the gate to slow the turn-on transient and limit di/dt through the load. Place a TVS diode or zener clamp from drain to source if the application includes inductive kick (relays, solenoids, motors), even though Vishay tests this part to 100% UIS — the avalanche energy is finite and clamping extends long-term reliability. Per Vishay document 75769, recommended storage and operating temperatures are -55C to +150C, but designers should target a Tj margin of at least 25C below 150C for production robustness.
コンプライアンス情報
GE3 suffix indicates lead-free (Pb-free) and halogen-free per Vishay's standard ordering nomenclature. AEC-Q100 automotive qualification is not applicable for this industrial-grade part; for automotive P-channel MOSFETs in the same family, contact Vishay automotive sales.
