AD7878JPZ-REEL
AD7878JPZ-REEL - 12-Bit 100kHz SAR ADC | Analog Devices
The Analog Devices AD7878JPZ-REEL is a complete 12-bit analog-to-digital converter (ADC) with a maximum throughput of 100 kHz, integrating a track/hold amplifier, voltage reference, 8-word FIFO, and DSP-compatible serial interface into a single IC. Housed in a 28-pin PLCC (11.51 x 11.51 mm) plastic leaded chip carrier package, this successive-approximation-register (SAR) ADC operates from a single +5 V analog supply and a -5 V to -3 V negative supply, accepting bipolar input ranges of ±3 V or ±10 V (depending on configuration). According to the Analog Devices AD7878 datasheet, the converter delivers 2 microsecond acquisition time and 7 microsecond conversion time, with input voltage tolerance up to ±3 V as documented in the verified supplier listings.
A successive-approximation-register ADC is a converter architecture that resolves one bit per clock cycle using an internal binary-weighted capacitor network and a comparator, then a digital-to-analog converter (DAC). This topology delivers deterministic latency, excellent DC accuracy, and inherently anti-alias-friendly sampling, making it preferred for multiplexed data-acquisition systems, motor-control feedback loops, and DSP front-ends where latency must be bounded. Within the broader converter hierarchy, SAR ADCs sit between flash converters (fastest, lowest resolution) and sigma-delta ADCs (highest resolution, lowest bandwidth), with the AD7878 occupying the high-speed 12-bit niche favored in industrial control and instrumentation.
Key features of the AD7878JPZ-REEL include: 8.3 kSamples/sec nominal throughput (per third-party spec sheet), 2 us track/hold acquisition time, 7 us conversion time, internal 3 V Zener reference, 8-word FIFO buffer for DSP handshake efficiency, and on-chip DSP-compatible serial interface logic. The LC2MOS (Linear Compatible CMOS) process combines precision bipolar analog stages with low-power CMOS digital logic, enabling the integrated DSP-ready interface without external glue logic. The commercial temperature grade (0 C to +70 C) suits indoor industrial, instrumentation, and laboratory equipment.
Typical applications span process-control front-ends, multiplexed data-acquisition systems, DSP-input signal chains, motor-control position feedback, and laboratory instrumentation. The on-chip FIFO is particularly valuable when the host processor (DSP or microcontroller) cannot service every conversion interrupt; the 8-word depth absorbs timing jitter and reduces interrupt overhead.
When designing with this part, ensure both +5 V (VDD) and -5 V (or -3 V) negative supplies are decoupled with 0.1 uF ceramic capacitors placed within 5 mm of the supply pins, and observe the maximum throughput vs. acquisition/conversion timing budget described in the datasheet timing section. The bipolar input requires input-signal conditioning to scale within the ±3 V (default) or ±10 V (with attenuation) input range.
This page synthesizes distributor pricing, drop-in same-package alternatives, and PCB-level design guidance not found in the bare manufacturer datasheet, with parameters sourced from Analog Devices, DigiKey, Mouser, Octopart, and third-party spec repositories as of 2026-10-12.
견적 요청
문의하기