EPC2L120N vs EPC22LC20 비교

다음의 상세 나란히 비교: EPC2L120N 제조: Intel 및 EPC22LC20 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPC2L120N EPC22LC20
브랜드 Intel Intel
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete Obsolete
재고 상태 In Stock In Stock
단가 (USD) $7.85 $4.10
Device Type Configuration Device for SRAM-based LUT FPGAs —
Manufacturer Intel (formerly Altera) —
Family EPC2 (Enhanced Configuration Device) —
Memory Capacity 165,888 bits (400,000 gates equivalent) —
Operating Voltage (VCCIO) 2.7 V to 3.6 V —
5V Tolerance Yes (5V-tolerant I/O) —
Configuration Clock (FPP) Up to 66 MHz —
Configuration Clock (PS) Up to 33 MHz —
Internal Oscillator 8 MHz with programmable divider —
JTAG Interface IEEE Std 1149.1 compliant, ISP support —
Programming Cycles 100,000 erase/program cycles —
Sector Erase Time [DATA_NEEDED: typical sector erase time] —
패키지 84-pin PLCC (J-Lead) —
Configuration Schemes FPP, PS, JTAG, daisy chain —
동작 온도 [DATA_NEEDED: industrial temp range] 0 C to +70 C (commercial)
Supported FPGA Families Cyclone, APEX, FLEX, Mercury, ACEX, Stratix ACEX 1K, APEX II, APEX 20K, FLEX 10K
RoHS 상태 unknown —
기능 — In-System Programmable Configuration PROM for SRAM-based FPGAs
메모리 크기 — 1.6 Mbit
Programmable Type — In System Programmable (IEEE 1532 / Jam STAPL)
Supply Voltage - Low Range — 3.0 V to 3.6 V
Supply Voltage - High Range — 4.75 V to 5.25 V
Configuration Interface — Altera serial configuration (DCLK / DATA0 / nSTATUS / CONF_DONE)
Programming Interface — JTAG (IEEE 1149.1 / IEEE 1532)
패키지 / 케이스 — 20-LCC (J-Lead, 9 x 9 mm)
실장 유형 — Surface Mount (PLCC socket compatible)
Packaging — Tube
Minimum DC Input Voltage — -0.3 V
Input Overshoot Tolerance — 7.0 V for <100 mA, <20 ns no-load
Input Undershoot Tolerance — -2.0 V for <100 mA, <20 ns no-load
Lead-Free / RoHS — [DATA_NEEDED: lead-free status not in verified data]

데이터시트 & 자료

모든 제품 보기 BOM 생성 견적 요청