AD670JN
AD670JN - 8-Bit Signal Conditioning ADC | Analog Devices
The Analog Devices AD670JN is an 8-bit signal-conditioning analog-to-digital converter with two inputs, a successive-approximation register, and a microprocessor bus interface. The converter is supplied in a 20-pin PDIP package and operates as a complete monolithic signal-conditioning ADC, integrating an instrumentation-amplifier front end, DAC, comparator, SAR, precision voltage reference, and three-state output buffer. According to the manufacturer datasheet, no external components or user trims are required to interface the device. The AD670 is positioned as a low-cost converter for acquiring bipolar or unipolar sensor signals with input conditioning included on the same chip. Its specified conversion speed is 10 microseconds, making it suitable for control, measurement, and instrumentation systems that require an 8-bit result but do not need the resolution or throughput of a modern high-resolution ADC. The 20-pin PDIP package is a through-hole format rather than a compact surface-mount option, which can simplify prototyping and replacement on older industrial and instrumentation boards. The AD670JN is listed as obsolete by ZDI, so procurement should account for limited original-equipment availability and possible premium pricing. Its 8-bit resolution gives 256 quantization levels, while the integrated instrumentation front end reduces the number of external analog components required around the converter. Engineers should verify supply voltage, input range, common-mode limits, reference behavior, interface timing, and acquisition sequencing against the manufacturer datasheet before adapting the device to a new design. Because the product is obsolete, any new production design should normally preserve the AD670JN footprint only when no functional and lifecycle-qualified alternative exists.
An ADC is an analog-to-digital converter, a semiconductor in the data-converter category that translates a continuous voltage into a digital code. The AD670JN belongs to the successive-approximation-register ADC family and combines that conversion mechanism with analog signal conditioning and a parallel microprocessor interface. A SAR ADC determines its result by successively comparing the input against an internally generated DAC level. The AD670 extends this basic conversion function with an instrumentation-amplifier front end, internal precision reference, comparator, and tri-state output buffer. This integration places the device in the hierarchy of ADC, data-converter IC, signal-conditioning converter, and general-purpose semiconductor. The integrated front end is especially relevant where a sensor produces a small differential signal riding on a larger common-mode voltage, because external amplification and offset conditioning would otherwise increase component count, board area, and calibration complexity.
The primary features identified in the verified manufacturer materials include complete 8-bit signal conditioning, a differential-input instrumentation-amplifier front end, a precision internal voltage reference, a microprocessor bus interface, and a conversion speed of 10 microseconds. The differential front end supports direct connection of suitable sensor outputs and rejects common-mode voltage to the extent permitted by the device's operating limits. The internal DAC, comparator, and SAR form the conversion core, while the three-state output buffer permits controlled connection to shared data buses. Because the converter includes the major analog blocks, it can reduce external passive-component and trimming requirements. Its 8-bit resolution divides the supported measurement span into 256 codes, making it appropriate for position, level, threshold, and proportional feedback systems where one least-significant bit is adequate.
The AD670JN uses a successive-approximation conversion architecture rather than a flash, pipeline, or sigma-delta architecture. SAR conversion is well suited to this device's stated 10-microsecond speed because it combines moderate throughput with an integrated monolithic implementation. The instrumentation-amplifier front end converts the conditioned input into a form that the comparator can evaluate against the internal DAC. During conversion, the successive-approximation logic successively updates the DAC, compares its voltage with the conditioned input, and records each comparison as one bit of the 8-bit result. The internal precision reference establishes the comparison scale. A microprocessor can read the converted byte through the parallel bus when the converter indicates completion. Tri-state outputs reduce bus contention when multiple converter outputs share a bus, provided the interface is sequenced correctly.
Typical uses include industrial process measurement, laboratory instrumentation, transducer signal acquisition, closed-loop position control, and legacy embedded control equipment. The integrated front end is useful when the source is differential and its amplitude is within the AD670's input and common-mode limits. The 10-microsecond conversion rate permits sampling of relatively slow variables such as temperature, pressure, position, and analog control feedback. Because the converter resolution is only 8 bits, it should not be selected for applications requiring precise waveform reconstruction, high dynamic range, or fine quantization. The PDIP-20 package also favors through-hole legacy equipment and industrial control cards rather than compact wearable or high-density embedded systems. The obsolete lifecycle status makes continuity of supply a central selection consideration.
The primary design concern is analog input conditioning. Engineers should verify the supported bipolar or unipolar input range, input impedance, common-mode range, differential input limits, and required source impedance against the manufacturer datasheet before applying external sensors. Grounding and decoupling must preserve reference stability and minimize conversion error. The microprocessor interface timing and output enable behavior must also be observed because the tri-state bus is intended for controlled system-level access. Since exact pin assignments, supply limits, and timing values were not supplied in the verified web data, they must not be inferred from generic AD670-family descriptions. New designs should also account for obsolescence, counterfeit screening, and a possible PCB redesign if a currently supported converter offers better resolution, packaging, or lifecycle assurance.
This page consolidates the verified distributor and manufacturer information for the AD670JN, including its obsolete status, 8-bit SAR architecture, 10-microsecond conversion speed, 20-pin PDIP package, pricing indication, and engineering-oriented replacement considerations. It also distinguishes verified facts from data requiring confirmation from the full manufacturer datasheet. That distinction is important for an obsolete converter, where package variants, temperature grades, screening levels, and supply conditions can materially affect drop-in qualification.
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