EP1K100QC208-3N vs EP1K100QI208-2 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1K100QC208-3N disebabkan oleh Altera dan EP1K100QI208-2 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EP1K100QC208-3N | EP1K100QI208-2 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | NRND |
| Product Series | ACEX-1K | — |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Number of Logic Elements | 4992 | — |
| Number of LABs | 624 | — |
| Embedded RAM Bits | 49152 | — |
| Total Typical Gates | 100K | — |
| Number of User I/Os | 147 | — |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage Range | [DATA_NEEDED: I/O supply voltage range] | — |
| Maximum Internal Clock Frequency | 200 MHz | — |
| Package Type | 208-BFQFP | — |
| Bilangan Pin | 208 | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Terminal Form | Gull Wing | — |
| JTAG Boundary Scan | IEEE Std. 1149.1-1990 compliant built-in BST | — |
| Lead-Free Version | Yes (N suffix) | — |
| Gambaran Suhu Operasi | Commercial grade ([DATA_NEEDED: exact operating temperature range]) | — |
| Supported Configuration Devices | EPC2/EPC16 family ([DATA_NEEDED: exact ACEX-1K supported list]) | — |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL level] | — |
| Status RoHS | [DATA_NEEDED: RoHS certificate status] | [DATA_NEEDED: RoHS compliance status] |
| Family | — | ACEX-1K |
| Logic Elements | — | 4,992 cells |
| System Gates | — | 100,000 |
| Logic Array Blocks (LABs) | — | 624 |
| Embedded Memory (EAB) | — | 49,152 bits |
| User I/Os | — | 147 |
| Maximum Operating Frequency | — | 250 MHz |
| Core Voltage (VCCINT) | — | 2.5 V |
| Process Technology | — | 0.22 umm CMOS SRAM |
| Kemasan | — | 208-pin PQFP (BFQFP) |
| Pitch | — | 0.5 mm |
| Suhu Operasi | — | -40C to +85C (Industrial) |
| Configuration Interface | — | JTAG (IEEE 1149.1) / serial / EPC2 |
| Global Clock Networks | — | 4 |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, 5V tolerant |