EP1K10TC100-2N vs EP1K10TC100-2 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1K10TC100-2N disebabkan oleh Altera dan EP1K10TC100-2 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Altera
EP1K10TC100-2N EP1K10TC100-2N - ACEX-1K FPGA, 10K Gates, 576 Cells | Altera

EP1K10TC100-2N - ACEX-1K FPGA, 10K Gates, 576 Cells | Altera

EP1K10TC100-2N ⚠ Bahagian terakhir untuk beli

Pengandingan Spesifikasi

Parametr EP1K10TC100-2N EP1K10TC100-2
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Masa Terakhir Dibeli Obsolete
Family ACEX-1K ACEX-1K
Logic Elements / Cells 576 576
Typical Gates 10,000 —
Logic Array Blocks (LABs) 72 —
Embedded Memory (EAB) 12,288 bits —
Maximum User I/O 66 —
Process Technology 0.22 um CMOS 0.22 μm CMOS
Core Voltage (VCCINT) 2.5 V —
I/O Voltage (VCCIO) 1.8 V / 2.5 V / 3.3 V / 5 V —
Speed Grade -2 —
Maximum Frequency 200 MHz —
Kemasan 100-pin TQFP (1.0 mm body, 0.5 mm pitch) 100-pin TQFP (TQFP-100)
Suhu Operasi 0 C to +70 C (commercial) 0 °C to 70 °C (TA, commercial)
Configuration Modes Passive Serial, Active Serial, JTAG —
Jenis Pemasangan Surface Mount Surface Mount
Status RoHS Lead-free / RoHS compliant Compliant (per Heisener / DigiKey listings)
Device Type — FPGA (Field Programmable Gate Array)
Number of Logic Array Blocks (LABs/CLBs) — 72
Total RAM Bits — 12288
Number of Gates — 10000 (typical); 56000 (maximum)
Number of User I/O — 66
Number of I/O Banks — [DATA_NEEDED: number of I/O banks]
Pin-to-Pin Logic Delay — 0.5 ns
Maximum Internal Frequency — 200 MHz (per FPGAkey listing)
Core Supply Voltage (VCCINT) — 2.375 V to 2.625 V (2.5 V nominal)
I/O Supply Voltage (VCCIO) — [DATA_NEEDED: VCCIO range]
Configuration Method — SRAM, serial / JTAG (IEEE 1149.1)
Lead-Free — Yes

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