EP1SGX40FF1020C7 vs EP1SGX40F1020 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1SGX40FF1020C7 disebabkan oleh Altera dan EP1SGX40F1020 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EP1SGX40FF1020C7 - Stratix GX FPGA 41,250 LE | Intel | 1020-BGA
EP1SGX40FF1020C7 ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EP1SGX40FF1020C7 | EP1SGX40F1020 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Masa Terakhir Dibeli | Obsolete |
| Series | Stratix GX | — |
| Family | Stratix GX (EP1SGX40) | Stratix GX |
| Logic Elements (LE) | 41,250 | — |
| Configurable Logic Blocks (CLB) | 4,125 | — |
| Embedded Memory (bits) | 3,423,744 | — |
| User I/O Pins | 624 | 624 |
| Number of Logic Array Blocks (LAB) | 4,125 | — |
| Number of I/O Banks | 12 | — |
| Core Supply Voltage (VCCINT) | 1.425 V to 1.575 V (nominal 1.5 V) | — |
| Speed Grade | 7 (-7, mid-speed) | — |
| Process Technology | CMOS | — |
| Suhu Operasi | 0 °C to 85 °C (commercial) | — |
| Kemasan | 1020-ball FC-FBGA (S-PBGA-B1020) | 1020-BBGA (FineLine BGA) |
| Package Dimensions | 33 mm × 33 mm | — |
| Ball Pitch | 1.00 mm | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Status RoHS | Compliant | [DATA_NEEDED: confirm from manufacturer page] |
| Configuration Modes | PS, PPS, PPA, JTAG, AS | — |
| DSP Blocks (9-bit) | 176 | — |
| Transceiver Channels | 20 full-duplex 3.1875 Gbps + 14 dedicated full-duplex 1.25 Gbps | — |
| PLLs | 8 enhanced + per-transceiver PLLs | — |
| Logic Elements | — | 41,250 |
| Embedded Memory Bits | — | 3,423,744 |
| Total RAM Bits | — | 3,423,744 |
| Number of LABs/CLBs | — | 4125 |
| Number of Transceivers | — | 20 |
| Transceiver Data Rate | — | 600 Mbps to 3.1875 Gbps |
| Gambaran Suhu Operasi | — | [DATA_NEEDED: industrial/commercial grade] |
| Tegangan Pemberi Arus | — | [DATA_NEEDED: core and I/O voltage] |
| Configuration Mode | — | SRAM-based LUT |
| JTAG Boundary Scan | — | Yes |