EP1SGX40FF1020I6 vs EP1SGX40GF1020I7 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1SGX40FF1020I6 disebabkan oleh Altera dan EP1SGX40GF1020I7 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EP1SGX40GF1020I7 - 41,250 Cells Stratix GX FPGA, 130nm, 1020-BGA | Altera
EP1SGX40GF1020I7 ObsoletePengandingan Spesifikasi
| Parametr | EP1SGX40FF1020I6 | EP1SGX40GF1020I7 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Series | Stratix® GX | EP1SGX40 |
| Family | EP1SGX40 | Stratix GX |
| Logic Elements | 41,250 | — |
| Embedded Memory | 3,423,744 bits | — |
| User I/Os | 624 | — |
| Logic Array Blocks (LABs) | 41,250 | — |
| Kemasan | 1020-ball FineLine BGA | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Core Voltage (VCCINT) | 1.5 V ±0.15 V | — |
| Suhu Operasi | -40 °C to +100 °C (Industrial) | — |
| Temperature Grade | I (Industrial) | Industrial (I7 suffix) |
| Transceiver Channels | Up to 20 channels | — |
| Max Transceiver Data Rate | 3.1875 Gbps | — |
| Transceiver Technology | CDR with embedded SERDES | — |
| Process Technology | CMOS | 130 nm CMOS |
| Configuration | SRAM-based LUT | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | — |
| Aras MSL | [DATA_NEEDED: MSL level] | — |
| Logic Cells | — | 41,250 |
| Configurable Logic Blocks (CLBs) | — | 4,125 |
| Total RAM Bits | — | 3,423,744 |
| User I/O Count | — | 624 |
| Number of Terminals | — | 1020 |
| Package Type | — | FC-FBGA (1020-ball) |
| Package Code | — | BGA |
| Terminal Form | — | Ball |
| Package Shape | — | Square |
| Core Voltage | — | 1.5 V |
| Combinatorial Delay | — | 9.48 ns per CLB |