EP20K200CB356C7N vs EP20K200EBC356-1 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K200CB356C7N disebabkan oleh Intel dan EP20K200EBC356-1 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EP20K200CB356C7N - APEX 20KC FPGA 200K Gates 356-BGA | Intel / Altera
EP20K200CB356C7N Obsolete
Pengandingan Spesifikasi
| Parametr | EP20K200CB356C7N | EP20K200EBC356-1 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20K (APEX 20KE) |
| Series | EP20K200 | — |
| System Gates | 200,000 | 200,000 |
| Logic Elements / Cells | 8,320 | 8,320 |
| Maximum Operating Frequency | 3571.6 MHz (internal equivalent) | — |
| Propagation Delay | 1.48 ns | 2.5 ns |
| User I/Os | 263 | — |
| Input Terminals | 267 | — |
| Supply Voltage (Nominal) | 1.8 V | — |
| Process Technology | 0.15 um CMOS | 0.22 µm CMOS |
| Suhu Operasi | 0C to +85C (Commercial) | 0 °C to 85 °C (Commercial) |
| Kemasan | 356-ball PBGA (S-PBGA) | 356-ball LBGA (35 x 35 mm) |
| Jenis Pemasangan | Surface Mount | Surface Mount (BGA) |
| Embedded Memory | ESBs (dual-port RAM/ROM/FIFO) | — |
| Clock Management | PLL with up to 4 outputs | — |
| JTAG Support | Yes (IEEE 1149.1) | — |
| In-System Programmable | Yes | — |
| Status RoHS | unknown | [DATA_NEEDED: RoHS status not stated in verified sources] |
| Maximum User I/Os | — | 277 |
| Core Voltage | — | 1.8 V (1.71 V to 1.89 V) |
| Internal Performance | — | Up to 367 MHz |
| Architecture | — | MultiCore (LUT + product-term + embedded memory) |
| On-chip Memory | — | Embedded System Blocks (ESB / SRAM) |
| Configuration Method | — | JTAG (ByteBlaster / MasterBlaster), passive serial |
| Development Software | — | Altera Quartus II |
| Status Lingkungan Hidup | — | Obsolete / EOL |