EP20K200CF484C9N vs EP20K200CF484C8ES Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K200CF484C9N disebabkan oleh Altera dan EP20K200CF484C8ES disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Altera
EP20K200CF484C8ES EP20K200CF484C8ES - APEX-20KC 200K Gates FPGA | Altera

EP20K200CF484C8ES - APEX-20KC 200K Gates FPGA | Altera

EP20K200CF484C8ES ⚠ Bahagian terakhir untuk beli

Pengandingan Spesifikasi

Parametr EP20K200CF484C9N EP20K200CF484C8ES
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Masa Terakhir Dibeli
Family APEX 20KC APEX 20K
Device Type FPGA (Field-Programmable Gate Array) —
Typical Gates 200,000 —
Logic Elements 8,320 8,320
Embedded System Block (ESB) Bits 106,496 —
Maximum User I/O 376 —
Frekuensi Klock Maksimum 250 MHz —
Process Technology 0.15 um CMOS —
Core Supply Voltage (VCCINT) 1.8 V —
I/O Supply Voltage (VCCIO) 3.3 V / 2.5 V / 1.8 V / 1.5 V (MultiVolt) —
Kemasan 484-pin FineLine BGA (FBGA) 484-pin FBGA (FineLine BGA)
Speed Grade C9 (250 MHz) C8 (-8 commercial)
Temperature Grade Industrial (0C to +85C) —
Jenis Pemasangan Surface Mount (BGA) Surface Mount
Configuration Scheme SRAM-based, supports passive serial/parallel and JTAG —
Aras MSL 3 (per JEDEC J-STD-020) —
Status RoHS Compliant —
Series — APEX-20KC
System Gates — 200,000
Embedded Memory (RAM bits) — 106,496
Number of Logic Array Blocks (LABs) — 104
Number of Embedded System Blocks (ESBs) — 13
User I/O Pins (max) — 376
PLLs — 4
Core Voltage — 1.8 V
Suhu Operasi — 0C to +85C (commercial)
Process Node — 0.18 micron CMOS
Configuration Interface — JTAG (IEEE 1149.1) / Altera serial
I/O Standards Supported — LVTTL, LVCMOS, PCI, GTL, SSTL, HSTL, AGP
Lead Free / RoHS — [DATA_NEEDED: lead-free status]

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