EP20K400CF672C9 vs EP20K400CF672C8ES Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K400CF672C9 disebabkan oleh Altera dan EP20K400CF672C8ES disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EP20K400CF672C9 - APEX-20K 400K Gates FPGA, 672-FBGA | Intel / Altera
EP20K400CF672C9 ObsoletePengandingan Spesifikasi
| Parametr | EP20K400CF672C9 | EP20K400CF672C8ES |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Series | APEX-20KC | EP20K400 |
| Logic Family / Architecture | MultiCore (LUT + ESB) | — |
| System Gates | 400,000 | — |
| Logic Cells / Elements | 16,640 | — |
| Maximum User I/Os | 488 | — |
| Kemasan / Case | 672-BBGA, FCBGA | — |
| Supplier Device Package | 672-FBGA (27x27 mm) | — |
| Ball Pitch | 1.0 mm | — |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage | [DATA_NEEDED: I/O VCCIO range] | — |
| Process Technology | 0.22 um CMOS | 0.15 µm CMOS |
| Internal Maximum Frequency | 368 MHz | — |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Suhu Operasi | 0C to +85C (Commercial) | 0°C to 85°C (Commercial) |
| Embedded Memory | Embedded System Blocks (ESB) | — |
| Configuration Method | Serial / Parallel PROM | — |
| Status RoHS | RoHS non-compliant (legacy) | [DATA_NEEDED: not stated in verified data] |
| Jenis Pemasangan | Surface Mount | — |
| Family | — | APEX 20KC |
| Logic Cells / Macros | — | 16,640 |
| System Gates (typical) | — | 400,000 |
| System Gates (maximum) | — | 212,992 [DATA_NEEDED: confirm datasheet interpretation] |
| Maximum User I/O | — | 488 (per Globalspec) / 484 (per Microchip USA) [DATA_NEEDED: confirm canonical value] |
| Bidirectional I/O | — | 484 |
| Maximum Internal Frequency | — | 301.21 MHz |
| Nominal Supply Voltage | — | 1.8 V |
| Supply Voltage Range | — | 1.71 V to 1.89 V |
| Kemasan | — | 672-BGA FineLine (FC-FBGA / S-PBGA-B672) |
| Logic Family | — | CMOS |
| Architecture | — | MultiCore™ (LUT + Embedded System Block) |
| Programming Method | — | JTAG / in-system via configuration memory |