EP20K600CB652C7ES vs EP20K600CB652C9 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K600CB652C7ES disebabkan oleh Altera dan EP20K600CB652C9 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP20K600CB652C7ES EP20K600CB652C9
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family APEX 20KC APEX 20KC
Logic Elements 24,320 —
System Gates 600,000 1,537,000
Maximum System Gates 1,053,840 —
Embedded Memory Bits 311,296 —
Embedded System Blocks (ESB) 26 —
Maximum User I/O 488 —
User I/O (this package) 488 (652-BGA) —
Supply Voltage - Core 1.71 V to 1.89 V (1.8 V nominal) —
Maximum Internal Clock Frequency 1666.6 MHz —
Propagation Delay 1.6 ns —
Process Technology 0.15 µm CMOS 0.15 µm all-layer copper CMOS
Suhu Operasi 0 °C to +85 °C (commercial) 0 °C to 85 °C (commercial)
Package Type 652-ball FineLine BGA —
JEDEC Package Code S-PBGA-B652 —
Configuration Modes Passive Serial, Passive Parallel, JTAG —
JTAG Boundary Scan IEEE 1149.1 compliant —
Status RoHS [DATA_NEEDED: RoHS status] Compliant (per Altera product page)
PLLs 4 —
Jenis Pemasangan Surface Mount (BGA) Surface Mount (BGA)
Logic Elements / Cells — 24,320
Number of LABs / CLBs — 2,432
Total RAM Bits — 311,296
User I/O — 488
Number of I/O Banks — [DATA_NEEDED: I/O bank count]
Tegangan Pemberi Arus — 1.71 V to 1.89 V
Internal Datapath Frequency — up to 250 MHz
Propagation Delay (typ.) — 1.48 ns
Kemasan — 652-BGA (45 × 45 mm, 1.27 mm pitch)
Configuration — JTAG IEEE 1149.1 / serial / EPC2-compatible
Product Status — Obsolete (per distributor listings)

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