EP20K600CF1020C8 vs EP20K600CB672C7 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K600CF1020C8 disebabkan oleh Altera dan EP20K600CB672C7 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP20K600CF1020C8 EP20K600CB672C7
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family APEX 20KC APEX 20KC
Series EP20K600 —
Logic Elements / Cells 24,320 —
System Gates 600,000 —
Embedded Memory (ESB) 311 Kbit (max) —
Process Technology 0.15 µm CMOS 0.15 µm all-layer copper-metal CMOS
Core Supply Voltage 1.8 V —
I/O Supply Voltage 1.8 V / 2.5 V / 3.3 V (MultiVolt) —
Maximum Internal Frequency 301.21 MHz (C8 speed grade) —
User I/O Pins 588 —
Dedicated Inputs 4 —
Kemasan 1020-ball FC-FBGA (1.00 mm pitch) 672-ball FineLine BGA (45 x 45 mm, 1.27 mm pitch)
Suhu Operasi 0 °C to +85 °C (commercial, "C") 0 °C to 85 °C (commercial)
Speed Grade C8 C7 (commercial, 0 °C to 85 °C)
Configuration Interface Serial / JTAG (IEEE 1149.1) —
PCI Compliance PCI SIG Local Bus Spec Rev 2.2, 32/64-bit, 33/66 MHz, 3.3 V —
Status RoHS [DATA_NEEDED: RoHS status] Compliant
Device Type — FPGA / Programmable Logic Device (PLD)
Typical Gates — 600,000
Maximum System Gates — 1,053,840
Logic Elements — 30,960 (typical)
Embedded Memory — 311 kbits (EAB-based)
User I/Os — 488
Propagation Delay — 1.48 ns
Core Voltage — 2.5 V
I/O Voltage Support — 1.8 V, 2.5 V, 3.3 V (MultiVolt I/O)
Number of PLLs — 4
Dual-Port RAM — Yes (4.5 ns access)
Supported I/O Standards — LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, AGP, HSTL, CTT
Configuration Method — EPC configuration devices / JTAG / passive serial

Laporan Datasheet & Sumber

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