EP20K600CF672C-7ES vs EP20K400CF672C-7ES Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K600CF672C-7ES disebabkan oleh Altera dan EP20K400CF672C-7ES disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP20K600CF672C-7ES EP20K400CF672C-7ES
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family APEX 20KC APEX 20KC
Device Type Field Programmable Gate Array (FPGA) —
Maximum System Gates 1,560,000 (typical 600K application gates) —
Typical Logic Elements 24,320 (per APEX 20KC 600K family) —
Maximum User I/O 488 488
Total I/O Lines 504 (per Microchip USA listing) —
Total Inputs 508 —
Embedded System Blocks (ESBs) 248 —
Embedded RAM 248 Kbits (dual-port) —
PLLs 4 —
Propagation Delay 1.48 ns to 1.6 ns —
Frekuensi Klock Maksimum 1666.6 MHz —
Speed Grade -7 -7
Process Technology 0.15 micron all-layer copper CMOS 0.15 um CMOS
Kemasan 672-ball FCBGA (FineLine BGA), 45 x 45 mm, 1.27 mm pitch 672-BGA (FineLine BGA, 1.00 mm pitch)
Suhu Operasi 0 C to 85 C (Commercial) —
Core Voltage 1.8 V (typical APEX 20KC, exact value per datasheet) 1.8 V
Configuration Mode EPC serial / JTAG IEEE 1149.1 —
Compliance RoHS status unknown (verify with manufacturer datasheet) —
Series — EP20K400
System Gates — 400,000
Logic Elements — 16,640
Embedded Memory (bits) — 212,992
Number of PLLs — 4
Embedded Array Blocks (EABs) — [DATA_NEEDED: EAB count from datasheet]
Maximum Internal Clock Frequency — 375.94 MHz
Propagation Delay (per Sierra IC) — 1.400 ns
Gambaran Suhu Operasi — 0 C to 85 C (commercial)
Jenis Pemasangan — Surface Mount
Status RoHS — [DATA_NEEDED: RoHS compliance]
Configuration Support — EPC16, EPC8, EPC4, EPC2, EPC1 serial devices; JTAG

Laporan Datasheet & Sumber

Lihat Semua Produk Buat BOQ Minta Bao Harga