EP2A40F1020C8 vs EP2A40F1020C7ES Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP2A40F1020C8 disebabkan oleh Intel dan EP2A40F1020C7ES disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP2A40F1020C8 EP2A40F1020C7ES
Merek Intel Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Family APEX II APEX II
Logic Family CMOS —
Process Technology 0.15 µm all-layer copper, up to 8 metal layers 0.15 µm CMOS, all-layer copper, up to 8 metal layers
System Gates 1,500,000 —
Logic Cells 38,400 —
Macros / Macro Cells 2,560 —
Embedded RAM [DATA_NEEDED: total ESB bits] —
Maximum Internal Frequency 376 MHz —
Propagation Delay 1.55 ns —
User I/O Pins 735 —
Core Voltage (VCCINT) 1.5 V —
I/O Voltage (VCCIO) MultiVolt 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V —
Package Type FC-FBGA (FineLine BGA) —
Package Pin Count 1020 —
Package Dimensions 33 x 33 mm —
Ball Pitch 1.0 mm —
Suhu Operasi 0 C to +85 C (commercial, 'C' suffix) [DATA_NEEDED: commercial/industrial grade]
Status RoHS [DATA_NEEDED: confirm per lot] [DATA_NEEDED]
Configuration Interface JTAG / Altera serial —
Design Toolchain Quartus II (legacy version 4.x or earlier recommended) —
Logic Elements — 38,400
Typical Gates — 1,500,000
Embedded Memory — 655,360 bits
Maximum User I/O — 735
Maximum Frequency — 562 MHz
Core Voltage — 1.5 V
Kemasan — 1020-pin FC-FBGA
Speed Grade — C7 (with ES enhanced speed suffix)
High-Speed Interface — 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport
I/O Standards — LVTTL, LVCMOS, LVDS, LVPECL, PCML, HyperTransport, 1.5/1.8/2.5/3.3 V
PLLs — Up to 8 (per datasheet family feature)
Programming Interface — JTAG (IEEE 1149.1), passive serial
Jenis Pemasangan — Surface Mount (FC-FBGA)

Laporan Datasheet & Sumber

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