EP2SGX30CF780C4 vs EP2S90F780C5 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP2SGX30CF780C4 disebabkan oleh Intel dan EP2S90F780C5 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EP2S90F780C5 - Stratix II FPGA, 90,960 LEs, 780-FBGA | Altera
EP2S90F780C5 ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EP2SGX30CF780C4 | EP2S90F780C5 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Masa Terakhir Dibeli |
| Family | Stratix II GX | Stratix II FPGA |
| Logic Elements | 33,880 | 90,960 |
| Embedded Memory Bits | 1,369,728 | — |
| Maximum User I/Os | 361 | — |
| LABs/CLBs | 1,694 | — |
| Maximum Operating Frequency | 732.1 MHz | — |
| Process Technology | 90 nm | 90 nm CMOS |
| Core Supply Voltage | 1.2 V | — |
| Kemasan | 780-BBGA (flip-chip) | — |
| Jenis Pemasangan | Surface Mount | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | RoHS non-compliant (per alterachips listing) |
| AEC-Q100 | Not applicable (FPGA, commercial/industrial) | — |
| Operating Temperature Grade | Commercial (0C to +85C) | — |
| Transceivers | Yes (Stratix II GX integrated) | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Aras MSL | [DATA_NEEDED: MSL level] | — |
| Series | — | Stratix II |
| Logic Array Blocks / ALMs | — | 4,548 |
| Embedded RAM (Total RAM Bits) | — | 4,520,488 |
| Embedded Multiplier / DSP Blocks | — | [DATA_NEEDED: DSP block count and 18x18 multiplier count] |
| User I/O Pins | — | 534 |
| Core Voltage | — | 1.15 V to 1.25 V |
| Internal Operating Frequency (max) | — | 609.76 MHz |
| Package Type | — | 780-ball FC-FBGA (FineLine BGA) |
| Package Dimensions | — | 29 x 29 mm |
| Ball Pitch | — | 1.0 mm |
| Suhu Operasi | — | 0 C to 85 C (Commercial) |
| Speed Grade | — | C5 |
| Configuration Modes | — | Passive Serial, Fast Passive Parallel, JTAG |
| PLLs | — | 4 enhanced + up to 8 fast PLLs |
| Lead Free Status | — | [DATA_NEEDED: lead-free per JEDEC J-STD-609] |