EP3SL50F780C4LN vs EP3SE50F780C4N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP3SL50F780C4LN disebabkan oleh Intel dan EP3SE50F780C4N disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP3SL50F780C4LN EP3SE50F780C4N
Merek Intel Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND NRND
Series Stratix III L —
Family Stratix III L (Low-Power) Stratix III E
Logic Elements (LE) 47,500 47,500
Logic Array Blocks (LAB) 1,900 —
Total RAM Bits 2,184,192 —
User I/O Pins 488 —
Kemasan 780-BBGA, FCBGA (29x29 mm) 780-Ball FBGA, 29 mm x 29 mm, 1.0 mm pitch
Jenis Pemasangan Surface Mount Surface Mount (BGA)
Process Technology 65 nm —
Core Voltage (VCCINT) 0.86 V to 1.15 V —
Suhu Operasi 0C to +85C (Commercial) 0C to +85C (C4 commercial grade)
Speed Grade C4 —
Lead-Free / RoHS Yes (LN suffix indicates lead-free, enhanced) —
Aras MSL [DATA_NEEDED: MSL moisture sensitivity level] 3 (per JEDEC J-STD-020, FBGA package)
Transceivers [DATA_NEEDED: number of integrated transceivers for F780 package] —
DSP Blocks [DATA_NEEDED: 18x18 multiplier count for EP3SL50] —
Configuration SRAM-based, configured via Quartus II —
Embedded Memory Bits — 5,760,000
Embedded Memory (M9K/M144K blocks) — 488 (per family datasheet)
Number of LABs — 1900
Maximum User I/Os — 488
DSP Blocks (18x18 multipliers) — 432
PLLs — 12 (per family datasheet)
Maximum Operating Frequency — 717 MHz
Transceiver Channels — Up to 12 (per family, model-dependent)
Transceiver Data Rate — Up to 6.375 Gbps (per Stratix III E family)
Process Node — 40 nm
Tegangan Pemberi Arus — Core 0.9 V, I/O 1.2 V-3.3 V (multi-rail)
Configuration Modes — JTAG, Passive Serial, Fast Passive Parallel
Status RoHS — Lead-free / RoHS compliant
Hard Memory Controller — DDR2/DDR3 SDRAM (per Stratix III E family)

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