EP4CE6F17C6N vs EP4CE6F17C7N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP4CE6F17C6N disebabkan oleh Altera dan EP4CE6F17C7N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EP4CE6F17C6N | EP4CE6F17C7N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Series | Cyclone IV E | Cyclone IV E |
| Logic Elements (LEs) | 6,272 | — |
| Configurable Logic Blocks (CLBs) | 392 | — |
| Embedded Memory | 270 Kbits | — |
| Maximum User I/O Pins | 179 | — |
| Kemasan | 256-FBGA (F17), 17x17 mm, 1.0 mm pitch | — |
| Speed Grade | C6 (commercial) | — |
| Suhu Operasi | 0C to +85C (commercial) | — |
| Process Technology | 60 nm low-power | 60 nm |
| Supply Voltage Core | [DATA_NEEDED: core voltage] | — |
| PLLs | [DATA_NEEDED: PLL count] | — |
| DSP / Multiplier Blocks | [DATA_NEEDED: multiplier count] | — |
| Jenis Pemasangan | Surface Mount (BGA) | Surface Mount |
| Lead-Free / RoHS | Lead free, RoHS compliant | — |
| Configuration Modes | JTAG, Active Serial, Active Parallel | — |
| Manufacturer | — | Altera / Intel |
| Product Category | — | FPGA - Field Programmable Gate Array |
| Number of Logic Elements / Cells | — | 6272 |
| Number of CLBs / LABs | — | 392 |
| Total RAM Bits | — | 276480 bits |
| Number of User I/O | — | 179 |
| Kemasan / Case | — | 256-LBGA (FBGA-256) |
| Package Body Size | — | 17 mm x 17 mm |
| Ball Pitch | — | 1 mm |
| Core Supply Voltage | — | 1.2 V |
| Maximum Internal Clock Frequency | — | 472.5 MHz |
| Lead-Free Finish | — | Yes (N suffix) |
| Number of Terminations | — | 256 |
| RoHS Compliance | — | Compliant |
| Status Lingkungan Hidup | — | Active production |
| Operating Temperature Grade | — | [DATA_NEEDED: exact C-grade junction/ambient temperature range from Cyclone IV datasheet] |
| On-Chip PLL Count | — | [DATA_NEEDED: number of PLLs] |