EP4CE6F17C9LN vs EP4CE6F17C7N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP4CE6F17C9LN disebabkan oleh Intel dan EP4CE6F17C7N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EP4CE6F17C9LN | EP4CE6F17C7N |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Series | Cyclone IV E | Cyclone IV E |
| Family | Cyclone IV E | — |
| Logic Elements (LE) | 6,272 | — |
| Logic Array Blocks | 392 | — |
| Embedded Memory | 270 Kbit | — |
| Embedded Multipliers (18x18) | 15 | — |
| PLLs | 6 | — |
| Maximum User I/O | 179 | — |
| Core Voltage (VCCINT) | 1.2 V | — |
| I/O Bank Count | 8 | — |
| Process Technology | 60 nm low-k CMOS | 60 nm |
| Internal Performance | 265 MHz (typical) | — |
| Kemasan | 256-ball FBGA (FineLine BGA, 17x17 mm, 0.4 mm pitch) | — |
| Configuration Modes | JTAG, AS, AP, PS | — |
| Suhu Operasi | 0C to +85C (commercial, -N speed grade) | — |
| Status RoHS | Compliant | — |
| Speed Grade | C9 (-N speed grade) | — |
| Manufacturer | — | Altera / Intel |
| Product Category | — | FPGA - Field Programmable Gate Array |
| Number of Logic Elements / Cells | — | 6272 |
| Number of CLBs / LABs | — | 392 |
| Total RAM Bits | — | 276480 bits |
| Number of User I/O | — | 179 |
| Kemasan / Case | — | 256-LBGA (FBGA-256) |
| Package Body Size | — | 17 mm x 17 mm |
| Ball Pitch | — | 1 mm |
| Core Supply Voltage | — | 1.2 V |
| Maximum Internal Clock Frequency | — | 472.5 MHz |
| Lead-Free Finish | — | Yes (N suffix) |
| Number of Terminations | — | 256 |
| Jenis Pemasangan | — | Surface Mount |
| RoHS Compliance | — | Compliant |
| Status Lingkungan Hidup | — | Active production |
| Operating Temperature Grade | — | [DATA_NEEDED: exact C-grade junction/ambient temperature range from Cyclone IV datasheet] |
| On-Chip PLL Count | — | [DATA_NEEDED: number of PLLs] |