EP610DC-20 vs EP610DC-10 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP610DC-20 disebabkan oleh Intel dan EP610DC-10 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EP610DC-20 | EP610DC-10 |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Product Type | CMOS UV-Erasable Programmable Logic Device (EPLD) | — |
| Family | Classic EP610 | — |
| Logic Macrocells | 16 | — |
| Dedicated Inputs | 4 | — |
| I/O Pins | 16 (bidirectional) | [DATA_NEEDED: exact I/O count for CDIP-24 variant] |
| Total Usable Pins | 20 | — |
| Product Terms (p-terms) | 160 | — |
| Propagation Delay (tPD) | 22 ns | — |
| Maximum Toggle Frequency (fMAX) | 55.6 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | — |
| Suhu Operasi | 0 °C to 70 °C (commercial) | 0C to +70C (commercial) |
| Kemasan | 24-pin Ceramic DIP (CDIP-24) with UV window | 24-pin CDIP (Ceramic DIP, windowed) |
| Programming Method | UV erasure + parallel programmer | — |
| Process Technology | CMOS, UV-erasable floating gate | — |
| Jenis Pemasangan | Through-hole | Through-Hole |
| Status RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: not stated in verified web data] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device Family | — | Altera Classic EPLD |
| Macrocells | — | 16 |
| Maximum Pipelined Data Rate | — | 100 MHz |
| Pin-to-Pin Propagation Delay (tpd) | — | 10 ns |
| Speed Grade | — | -10 |
| Technology | — | CMOS, EPROM-based (UV-erasable) |
| Tegangan Pemberi Arus | — | 5 V (single supply) |
| Logic Elements | — | 16 macrocells (programmable AND/OR array) |
| Configuration Memory | — | UV-erasable EPROM |
| Reprogrammable | — | Yes (UV erase window on package) |