EP610DC-25 vs EP610DC15 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP610DC-25 disebabkan oleh Rochester Electronics dan EP610DC15 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Rochester Electronics
EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester
EP610DC-25 ✓ AktifPengandingan Spesifikasi
| Parametr | EP610DC-25 | EP610DC15 |
|---|---|---|
| Merek | Rochester Electronics | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | NRND |
| Family | Altera Classic EPLD | EP610 Classic EPLD |
| Product Type | EPLD (Erasable Programmable Logic Device) | Classic EPLD (Erasable Programmable Logic Device) |
| Macrocells | 16 | 16 |
| Equivalent Gates | 300 | — |
| Maximum Propagation Delay (tPD) | 25 ns | — |
| Pipelined Data Rate | Up to 100 MHz | up to 100 MHz |
| Number of I/O Pins | 22 | — |
| Number of Dedicated Inputs | 4 | — |
| Total Pin Count | 24 | — |
| Kemasan | 24-pin CDIP (Ceramic DIP, through-hole) | 24-pin CDIP (Ceramic DIP, windowed) |
| Jenis Pemasangan | Through Hole | Through-Hole |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 4.75 V to 5.25 V |
| Suhu Operasi | 0 C to +70 C | 0C to +70C |
| Technology | CMOS EPROM (UV-erasable) | CMOS |
| Programming Method | JEDEC fuse-map / UV-erase | — |
| Speed Grade Suffix | -25 (25 ns tPD) | — |
| Architecture | — | PAL-type |
| Propagation Delay (tPD) | — | 15 ns |
| Maximum Clock Frequency (fMAX) | — | 71.4 MHz |
| Total Inputs | — | 20 |
| I/O Lines | — | 16 |
| Product Terms | — | 160 |
| Reprogrammability | — | Yes (UV erasable via windowed package) |
| Status RoHS | — | unknown |